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PDF ( 数据手册 , 数据表 ) FAN2560

零件编号 FAN2560
描述 350mA Low-VIN LDO
制造商 Fairchild Semiconductor
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FAN2560 数据手册, 描述, 功能
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February 2008
FAN2560
350mA Low-VIN LDO with Fast Transient Response
Features
ƒ 55µA Typical Quiescent Current
ƒ Up to 350mA Output Current
ƒ 2.9V to 5.5V Bias Supply Voltage
ƒ VOUT+0.1V to 5.5V Power Input Supply Voltage
ƒ Fixed Voltage Options: 1.3V and 1.5V
ƒ Thermal Shutdown Protection (TSD)
ƒ Input Under-Voltage Lockout (UVLO)
ƒ Short-Circuit Current Protection (SCP)
ƒ 5-bump 0.96 x 1.33mm WLCSP
Applications
ƒ Moderate Current Digital Loads
ƒ DVB-H, DMB Processors
ƒ Handsets, Smartphones
ƒ WLAN DC-DC Converter Modules
ƒ PDA, DSC, PMP, and MP3 Players
ƒ Portable Hard Disk Drives
Description
The FAN2560 is a linear low-dropout (LDO) regulator
with a split-supply architecture. Separate bias and
supply inputs allow bias to be taken directly from the
battery, while the input is taken from a lower pre-
regulated source. This allows a smaller differential
voltage between input and output, which provides
greater efficiency over a wider VBAT range.
The FAN2560 is available in a fixed-voltage output,
5-bump, WLCSP package.
Typical Applications
2.9 to 5.5V
VOUT +0.3V
CIN
1F
VBAT
VIN
GND
EN
FAN2560
VOUT
COUT
2.2 F
2.9 to 5.5V
CIN
1μF
VBAT
VIN
GND
EN
FAN2560
VOUT
COUT
2.2μF
Figure 1. Separate Supply and Bias Line
Figure 2. Connected Supply and Bias Line
Ordering Information
Part Number
FAN2560UC13X
FAN2560UC15X
Operating Temperature Range
Package
-40°C to 85°C
WLCSP-5 0.96 x 1.33mm
-40°C to 85°C
WLCSP-5 0.96 x 1.33mm
All packages are lead free per JEDEC: J-STD-020B standard.
© 2006 Fairchild Semiconductor Corporation
FAN2560 • Rev. 1.0.0
Packing Method
Tape and Reel
Tape and Reel
www.fairchildsemi.com







FAN2560 pdf, 数据表
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Application Information
ENABLE Latch
A pull-down resistor latches the LOW state of the EN
input after this input is externally forced LOW. A low-
side switch turns ON a 370 kΩ pull-down resistance to
keep the EN in LOW state, even if the EN input is
subsequently left floating.
Soft-Start
A soft-start function prevents an excessive input current
flow during start-up. When the LDO is enabled, the soft-
start circuit limits the peak inrush current below the
specified maximum value, which increases when COUT
increases. To further reduce the peak inrush current,
the output capacitance may be lowered to 1µF, taking
advantage of FAN2560 stability over a wide range of
COUT capacitance.
Short-Circuit and Thermal Protection
The FAN2560 output current voltage characteristic has
a fold-back shape that indicates a short-circuit current
limit lower than the maximum load current. Although the
short-circuit current is limited to below 500mA, the
device can supply high peak output currents of up to 1A
for brief periods. However, this output overload may
cause the die temperature to increase and exceed
maximum ratings due to power dissipation. In such
cases, depending upon the ambient temperature, VIN,
load current, and the junction-to-air thermal resistance
(θJA) of the die, the device may enter thermal shutdown.
During output overload conditions, when the die
temperature exceeds the shutdown limit temperature of
150°C, the onboard thermal protection disables the
output until the temperature drops below this limit, at
which point the output is re-enabled.
Thermal Considerations
For best performance, the die temperature and the
power dissipated should be kept at moderate values.
The maximum power dissipated can be evaluated
based on the following relationship:
PD(max)
=
TJ(max) TA
Θ JA
(1)
where TJ(max) is the maximum allowable junction
temperature of the die, which is 125°C, and TA is the
ambient operating temperature. θJA is dependent on the
surrounding PCB layout and can be improved by
providing a heat sink of surrounding copper ground.
The addition of backside copper with through-holes,
stiffeners, and other enhancements can also aid in
reducing θJA. The heat contributed by the dissipation of
other devices located nearby must be included in
design considerations.
Reverse Current Path
During normal operation, VIN is higher than VOUT and
the parasitic diode for the series power FET is reverse
biased. If the output voltage is externally forced above
the input voltage, the parasitic diode gets forward
biased and starts to conduct. In this case, it is
necessary to limit the reverse current to maximum
100mA to avoid adversely affecting reliability.
Capacitors Selection
The FAN2560 is stable with a wide range of ceramic
output capacitors. An output capacitor of at least 0.7µF
effective capacitance and the minimum ESR over the
frequency range of 3 to 300mΩ is required to ensure
stability over the full range of supply voltages and load
currents. High-ESR tantalum or electrolytic capacitors
may be used, but a low ESR ceramic capacitor has to
be connected in parallel at the output, at a distance no
more than 1-inch from the VOUT pin. The MLCC
capacitors indicated in Table 1 have been successfully
tested with the FAN2560.
Table 1. Recommended Capacitors
Capacitance
1μF
2.2μF
2.2μF
Size
0603
0603
0402
Vendor
MURATA
MURATA
MURATA
Part number
GRM188R71C105KA120
GRM188R61A225KF340
GRM155R60J225ME15
© 2006 Fairchild Semiconductor Corporation
FAN2560 • Rev. 1.0.0
8
www.fairchildsemi.com














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