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PDF ( 数据手册 , 数据表 ) LF147

零件编号 LF147
描述 Wide Bandwidth Quad JFET Input Operational Amplifiers
制造商 National Semiconductor
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LF147 数据手册, 描述, 功能
May 1999
LF147/LF347
Wide Bandwidth Quad JFET Input Operational Amplifiers
General Description
The LF147 is a low cost, high speed quad JFET input opera-
tional amplifier with an internally trimmed input offset voltage
(BI-FET IItechnology). The device requires a low supply
current and yet maintains a large gain bandwidth product
and a fast slew rate. In addition, well matched high voltage
JFET input devices provide very low input bias and offset
currents. The LF147 is pin compatible with the standard
LM148. This feature allows designers to immediately up-
grade the overall performance of existing LF148 and LM124
designs.
The LF147 may be used in applications such as high speed
integrators, fast D/A converters, sample-and-hold circuits
and many other circuits requiring low input offset voltage,
low input bias current, high input impedance, high slew rate
and wide bandwidth. The device has low noise and offset
voltage drift.
Features
n Internally trimmed offset voltage: 5 mV max
n Low input bias current: 50 pA
n Low input noise current:
n Wide gain bandwidth: 4 MHz
n High slew rate: 13 V/µs
n Low supply current: 7.2 mA
n High input impedance: 1012
n Low total harmonic distortion AV=10,: <0.02%
RL=10k, VO=20 Vp-p, BW=20 Hz−20 kHz
n Low 1/f noise corner: 50 Hz
n Fast settling time to 0.01%: 2 µs
Simplified Schematic
14 Quad
Connection Diagram
Dual-In-Line Package
DS005647-13
DS005647-1
Note 1: Available per SMD #8102306, JM38510/11906.
Top View
Order Number LF147J, LF347M, LF347BN,
LF347N or LF147J/883 (Note 1)
See NS Package Number J14A, M14A or N14A
BI-FET IIis a trademark of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation DS005647
www.national.com







LF147 pdf, 数据表
Application Hints (Continued)
Exceeding the positive common-mode limit on a single input
will not change the phase of the output; however, if both in-
puts exceed the limit, the output of the amplifier will be forced
to a high state.
The amplifiers will operate with a common-mode input volt-
age equal to the positive supply; however, the gain band-
width and slew rate may be decreased in this condition.
When the negative common-mode voltage swings to within
3V of the negative supply, an increase in input offset voltage
may occur.
Each amplifier is individually biased by a zener reference
which allows normal circuit operation on ±4.5V power sup-
plies. Supply voltages less than these may result in lower
gain bandwidth and slew rate.
The LF147 will drive a 2 kload resistance to ±10V over the
full temperature range. If the amplifier is forced to drive
heavier load currents, however, an increase in input offset
voltage may occur on the negative voltage swing and finally
reach an active current limit on both positive and negative
swings.
Precautions should be taken to ensure that the power supply
for the integrated circuit never becomes reversed in polarity
Detailed Schematic
or that the unit is not inadvertently installed backwards in a
socket as an unlimited current surge through the resulting
forward diode within the IC could cause fusing of the internal
conductors and result in a destroyed unit.
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order
to ensure stability. For example, resistors from the output to
an input should be placed with the body close to the input to
minimize “pick-up” and maximize the frequency of the feed-
back pole by minimizing the capacitance from the input to
ground.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance
from the input of the device (usually the inverting input) to AC
ground set the frequency of the pole. In many instances the
frequency of this pole is much greater than the expected 3
dB frequency of the closed loop gain and consequently there
is negligible effect on stability margin. However, if the feed-
back pole is less than approximately 6 times the expected 3
dB frequency a lead capacitor should be placed from the out-
put to the input of the op amp. The value of the added ca-
pacitor should be such that the RC time constant of this ca-
pacitor and the resistance it parallels is greater than or equal
to the original feedback pole time constant.
www.national.com
DS005647-9
8














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