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PDF ( 数据手册 , 数据表 ) ADE7166

零件编号 ADE7166
描述 Single-Phase Energy Measurement IC
制造商 Analog Devices
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ADE7166 数据手册, 描述, 功能
Data Sheet
Single-Phase Energy Measurement IC
with 8052 MCU, RTC, and LCD Driver
ADE7116/ADE7166/ADE7169/ADE7566/ADE7569
GENERAL FEATURES
Wide supply voltage operation: 2.4 V to 3.7 V
Internal bipolar switch between regulated and battery inputs
Ultralow power operation with power saving modes (PSM)
Full operation: 4 mA to 1.6 mA (PLL clock dependent)
Battery mode: 3.2 mA to 400 µA (PLL clock dependent)
Sleep mode
Real-time clock (RTC) mode: 1.5 µA
RTC and LCD mode: 38 µA (LCD charge pump enabled)
Reference: 1.2 V ± 0.1% (10 ppm/°C drift)
64-lead RoHS package option
Low profile quad flat package (LQFP)
Operating temperature range: −40°C to +85°C
ENERGY MEASUREMENT FEATURES
Proprietary analog-to-digital converters (ADCs) and digital
signal processing (DSP) provide high accuracy active
(watt), reactive (var), and apparent energy (volt ampere
(VA)) measurement
<0.1% error on active energy over a dynamic range of
1000 to 1 at 25°C
<0.5% error on reactive energy over a dynamic range of
1000 to 1 at 25°C (ADE7169 and ADE7569 only)
<0.5% error on root mean square (rms) measurements
over a dynamic range of 500 to 1 for current (Irms) and
100 to 1 for voltage (Vrms) at 25°C
Supports IEC 62053-21, IEC 62053-22, and IEC 62053-23;
EN 50470-3 Class A, Class B, and Class C; and ANSI C12-16
Differential input with programmable gain amplifiers (PGAs)
supports shunts, current transformers, and di/dt current
sensors (ADE7169 and ADE7569 only)
2 current inputs for antitamper detection in the ADE7116/
ADE7166/ADE7169
High frequency outputs proportional to Irms, active, reactive,
or apparent power (AP)
Table 1. Features Available on Each Device
Feature
Part No.
Antitamper
ADE7116, ADE7166, ADE7169
Watt, VA, Irms, Vrms
ADE7116, ADE7166, ADE7169, ADE7566,
ADE7569
Var ADE7169, ADE7569
di/dt Sensor
ADE7169, ADE7569
MICROPROCESSOR FEATURES
8052-based core
Single-cycle 4 MIPS 8052 core
8052-compatible instruction set
32.768 kHz external crystal with on-chip PLL
2 external interrupt sources
External reset pin
Low power battery mode
Wake up from input/output (I/O), temperature change1,
alarm, and universal asynchronous receiver/transmitter
(UART)
LCD driver operation
Temperature measurement
Real-time clock (RTC)
Counter for seconds, minutes, and hours
Automatic battery switchover for RTC backup
Operation down to 2.4 V
Ultralow battery supply current: 1.5 µA
Selectable output frequency: 1 Hz to 16 kHz
Embedded digital crystal frequency compensation for
calibration and temperature variation of 2 ppm resolution
Integrated LCD driver
108-segment driver for the ADE7566/ADE7569 and
104-segment driver for the ADE7116/ADE7166/ADE7169
2×, 3×, or 4× multiplexing
LCD voltages generated internally1 or with external resistors
Internal adjustable drive voltages up to 5 V independent
of power supply level1
On-chip peripherals
UART interface
SPI or I2C
Watchdog timer
Power supply management with user selectable levels
Memory: 16 kB flash memory, 512 bytes RAM
Development tools
Single pin emulation
IDE based assembly and C-source debugging
1 Not available in the ADE7116.
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2007–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com







ADE7166 pdf, 数据表
ADE7116/ADE7166/ADE7169/ADE7566/ADE7569
Data Sheet
Parameter
LCD, RESISTOR LADDER ACTIVE
Leakage Current
V1 Segment Line Voltage
V2 Segment Line Voltage
V3 Segment Line Voltage
ON-CHIP REFERENCE
Reference Error
Power Supply Rejection
Temperature Coefficient2
Min
Typ Max Unit
Test Conditions/Comments
±20 nA
LCDVA − 0.1
LCDVA V
LCDVB − 0.1
LCDVB V
LCDVC − 0.1
LCDVC V
1/2 and 1/3 bias modes, no load
Current on segment line = −2 µA
Current on segment line = −2 µA
Current on segment line = −2 µA
±0.9
80
10 50
mV
dB
ppm/°C
TA = 25°C
1 This function is not available in the ADE7116.
2 These specifications are not production tested but are guaranteed by design and/or characterization data on production release.
3 Delay between ADC conversion request and interrupt set.
4 This function is not available in the ADE7116.
DIGITAL INTERFACE
Table 4.
Parameter
LOGIC INPUTS1
All Inputs Except XTAL1, XTAL2, BCTRL,
INT0, INT1, RESET
Input High Voltage, VINH
Input Low Voltage, VINL
BCTRL, INT0, INT1, RESET
Input High Voltage, VINH
Input Low Voltage, VINL
Input Currents
RESET
Port 0, Port 1, Port 2
Input Capacitance
FLASH MEMORY
Endurance2
Data Retention3
CRYSTAL OSCILLATOR4
Crystal Equivalent Series Resistance
Crystal Frequency
XTAL1 Input Capacitance
XTAL2 Output Capacitance
MCU CLOCK RATE (fCORE)
LOGIC OUTPUTS
Output High Voltage, VOH
ISOURCE
Output Low Voltage, VOL5
ISINK
START-UP TIME6
PSM0 Power-On Time
From Power Saving Mode 1 (PSM1)
PSM1 to PSM0
From Power Saving Mode 2 (PSM2)
PSM2 to PSM1
PSM2 to PSM0
Min Typ Max Unit Test Conditions/Comments
2.0 V
0.8 V
1.3 V
0.8 V
−3.75
10
100
±100
−8.5
nA
nA
µA
pF
RESET = VSWOUT = 3.3 V
Internal pull-up disabled, input = 0 V or VSWOUT
Internal pull-up enabled, input = 0 V, VSWOUT = 3.3 V
All digital inputs
20,000
20
Cycles
Years TJ = 85°C
30 50 kΩ
32 32.768 33.5 kHz
12 pF
12 pF
4.096
MHz Crystal = 32.768 kHz and CD bits = 000
32 kHz Crystal = 32.768 kHz and CD bits = 111
2.4 V VDD = 3.3 V ± 5%
80 µA
0.4 V
2 mA
VDD = 3.3 V ± 5%
880 ms VDD at 2.75 V to PSM0 code execution
130 ms VDD at 2.75 V to PSM0 code execution
48 ms Wake-up event to PSM1 code execution
186 ms VDD at 2.75 V to PSM0 code execution
Rev. C | Page 8 of 152







ADE7166 equivalent, schematic
ADE7116/ADE7166/ADE7169/ADE7566/ADE7569
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Data Sheet
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
COM3/FP27 1
COM2/FP28 2
COM1 3
COM0 4
P1.2/FP25 5
P1.3/T2EX/FP24 6
P1.4/T2/FP23 7
P1.5/FP22 8
P1.6/FP21 9
P1.7/FP20 10
P0.1/FP19 11
P2.0/FP18 12
P2.1/FP17 13
P2.2/FP16 14
LCDVC 15
LCDVP2 16
ADE7566/ADE7569
TOP VIEW
(Not to Scale)
48 INT0
47 XTAL1
46 XTAL2
45 BCTRL/INT1/P0.0
44 SDEN/P2.3
43 P0.2/CF1/RTCCAL
42 P0.3/CF2
41 P0.4/MOSI/SDATA
40 P0.5/MISO
39 P0.6/SCLK/T0
38 P0.7/SS/T1
37 P1.0/RxD
36 P1.1/TxD
35 FP0
34 FP1
33 FP2
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Figure 9. Pin Configuration for the ADE7566/ADE7569
Table 13. Pin Function Descriptions
Pin No. Mnemonic
Description
1
COM3/FP27
Common Output 3/LCD Segment Output 27. COM3 is used for the LCD backplane.
2
COM2/FP28
Common Output 2/LCD Segment Output 28. COM2 is used for the LCD backplane.
3 COM1
Common Output 1. COM1 is used for the LCD backplane.
4 COM0
Common Output 0. COM0 is used for the LCD backplane.
5 P1.2/FP25
General-Purpose Digital I/O Port 1.2/LCD Segment Output 25.
6 P1.3/T2EX/FP24 General-Purpose Digital I/O Port 1.3/Timer 2 Control Input/LCD Segment Output 24.
7
P1.4/T2/FP23
General-Purpose Digital I/O Port 1.4/Timer 2 Input/LCD Segment Output 23.
8 P1.5/FP22
General-Purpose Digital I/O Port 1.5/LCD Segment Output 22.
9 P1.6/FP21
General-Purpose Digital I/O Port 1.6/LCD Segment Output 21.
10 P1.7/FP20
General-Purpose Digital I/O Port 1.7/LCD Segment Output 20.
11 P0.1/FP19
General-Purpose Digital I/O Port 0.1/LCD Segment Output 19.
12 P2.0/FP18
General-Purpose Digital I/O Port 2.0/LCD Segment Output 18.
13 P2.1/FP17
General-Purpose Digital I/O Port 2.1/LCD Segment Output 17.
14 P2.2/FP16
General-Purpose Digital I/O Port 2.2/LCD Segment Output 16.
15 LCDVC
This pin can be either an analog input when the LCD resistor driver is enabled or an analog output when
the LCD charge pump is enabled. When this pin is an analog output, it should be decoupled with a 470 nF
capacitor. When this pin is an analog input, it is internally connected to VDD. A resistor should be connected
between this pin and LCDVB to generate the two highest voltages for the LCD waveforms (see the LCD
Driver section).
16 LCDVP2
This pin can be either an analog input when the LCD resistor driver is enabled or an analog output when the
LCD charge pump is enabled. When this pin is an analog output, a 100 nF capacitor should be connected between
this pin and LCDVP1. When this pin is an analog input, it is internally connected to LCDVP1 (see the LCD
Driver section).
17 LCDVB
This pin can be either an analog input when the LCD resistor driver is enabled or an analog output when the
LCD charge pump is enabled. When this pin is an analog output, it should be decoupled with a 470 nF capacitor.
When this pin is an analog input, a resistor should be connected between this pin and LCDVC to generate an
intermediate voltage for the LCD driver. In 1/3 bias LCD mode, another resistor must be connected between this
pin and LCDVA to generate another intermediate voltage. In 1/2 bias LCD mode, LCDVB and LCDVA are internally
connected (see the LCD Driver section).
Rev. C | Page 16 of 152










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