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PDF ( 数据手册 , 数据表 ) DAC2932

零件编号 DAC2932
描述 40MSPS DIGITAL-TO-ANALOG CONVERTER
制造商 Burr-Brown
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DAC2932 数据手册, 描述, 功能
DAC2932
SBAS279C − AUGUST 2003 − REVISED OCTOBER 2004
Dual, 12ĆBit, 40MSPS
DigitalĆtoĆAnalog Converter
FEATURES
D Dual, 12-Bit, 40MSPS Current Output DAC
D Four 12-Bit Voltage Output DACs—for
www.DataSheet4U.comTransmit Control
D Single +3V Operation
D Very Low Power: 29mW
D High SFDR: 75dB at fOUT = 5MHz
D Low-Current Standby or Full Power-Down
Modes
D Internal Reference
D Optional External Reference
D Adjustable Full-Scale Range: 0.5mA to 2mA
APPLICATIONS
D Transmit Channels
− I and Q
− PC Card Modems: GPRS, CDMA
− Wireless Network Cards (NICs)
D Signal Synthesis (DDS)
D Portable Medical Instumentation
D Arbitrary Waveform Generation (AWG)
DESCRIPTION
The DAC2932 is a dual 12-bit, current-output
digital-to-analog converter (DAC) designed to combine the
features of high dynamic range and very low power
consumption. The DAC2932 converter supports update
rates of up to 40MSPS. In addition, the DAC2932 features
four 12-bit voltage output DACs, which can be used to
perform system control functions.
The advanced segmentation architecture of the DAC2932
is optimized to provide a high spurious-free dynamic range
(SFDR).
The DAC2932 has a high impedance (> 200k) differential
current output with a nominal range of 2mA and a
compliance voltage of up to 0.8V. The differential outputs
allow for either a differential or single-ended analog signal
interface. The close matching of the current outputs
ensures superior dynamic performance in the differential
configuration, which can be implemented with a
transformer. Using a small geometry CMOS process, the
monolithic DAC2932 is designed to operate within a
single-supply range of 2.7V to 3.3V. Low power
consumption makes it ideal for portable and
battery-operated systems. Further optimization by
lowering the output current can be realized with the
adjustable full-scale option. The full-scale output current
can be adjusted over a span of 0.5mA to 2mA.
For noncontinuous operation of the DAC2932, a full
power-down mode can reduce the power dissipation to as
little as 25µW.
The DAC2932 is designed to operate with a single parallel
data port. While it alternates the loading of the input data
into separate input latches for both current output DACs
(I-DACs), the updating of the analog output signal occurs
simultaneously. The DAC2932 integrates a temperature
compensated 1.22V bandgap reference. The DAC2932
also allows for additional flexibility of using an external ref-
erence.
The DAC2932 is available in a TQFP-48 package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright 2003−2004, Texas Instruments Incorporated
www.ti.com







DAC2932 pdf, 数据表
DAC2932
SBAS279C − AUGUST 2003 − REVISED OCTOBER 2004
PIN ASSIGNMENTS
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48 47 46 45 44 43 42 41 40 39 38 37
Bit_1 (MSB) 1
Bit_2 2
Bit_3 3
Bit_4 4
Bit_5 5
Bit_6 6
Bit_7 7
Bit_8 8
Bit_9 9
Bit_10 10
Bit_11 11
Bit_12 (LSB) 12
(V−DAC Section)
DAC2932
36 NC
35 +VAV
34 IOUT2
33 IOUT2
32 AGND
31 AGND
30 +VA
29 +VA
28 AGND
27 IOUT1
26 IOUT1
25 REFIN
13 14 15 16 17 18 19 20 21 22 23 24
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TERMINAL
NAME
NO.
D0:D11
1:12
DGND
13
+VD 14
CLK 15
PD 16
STBY
17
CS 18
GSET
19
DGND
AGND
AGND
FSA2
FSA1
REFIN
20
21
22
23
24
25
Terminal Functions
I/O DESCRIPTION
I Parallel data input port for the dual I-DACs; MSB = D11, LSB = D0; interleaved operation.
Digital ground of I-DAC
Digital supply of I-DAC; 2.7V to 3.3V
I Clock input of I-DAC
I Power-down pin; active high; a logic high initiates power-down mode.
I Standby pin of I-DAC; active low; a logic low initiates Standby mode with PD = Low.
A logic high configures the I-DAC for normal operation; pin will resume a high state if left open.
I Chip select; active low; enables the parallel data port of the I-DACs.
Pin will resume a low state if left open.
I Gain-setting mode. A logic high enables the use of two separate full-scale adjust resistors on pins FSA1
and FSA2. A logic low allows the use of a common full-scale adjust resistor connected to FSA1. The
function of the FSA2 pin is disabled, and any remaining resistor has no effect. The value for the RSET
resistor remains the same for a given full-scale range, regardless of the selected GSET mode. Pin will
resume a low state if left open.
Digital ground of I-DAC
Analog ground of I-DAC
Analog ground of I-DAC
I Full-scale adjust of I-DAC2; connect external gain setting resistor RSET2 = 19.6k.
I Full-scale adjust of I-DAC1; connect external gain setting resistor RSET1 = 19.6k.
I External reference voltage input; internal reference voltage output; bypass with 0.1µF to AGND for internal
reference operation.
8







DAC2932 equivalent, schematic
DAC2932
SBAS279C − AUGUST 2003 − REVISED OCTOBER 2004
ANALOG OUTPUTS
The DAC2932 provides two sets of complementary
current outputs, IOUT and IOUT. The simplified circuit of the
analog output stage representing the differential topology
is shown in Figure 28. The output impedance of IOUT and
IOUT results from the parallel combination of the differential
switches, along with the current sources and associated
parasitic capacitances.
+VA
DAC2932
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www.ti.com
0.5mA may be considered for applications that require low
power consumption, but can tolerate a slightly reduced
performance level.
The current-output DACs of the DAC2932 have a straight
offset binary coding format. With all bits high, the full-scale
output current (for example, 2mA) will be sourced at pins
IOUT1 and IOUT2, as shown in Table 2.
Table 2. Input Coding vs Analog Output Current
INPUT CODE
(D11−D0)
1111 1111 1111
1000 0000 0000
0000 0000 0000
IOUT
(mA)
2
1
0
IOUT
(mA)
0
1
2
IOUT
RL
IOUT
RL
Figure 28. Equivalent Analog Output
The signal voltage swing that develops at the two outputs,
IOUT and IOUT, is limited by a negative and positive
compliance. The negative limit of –0.5V is given by the
breakdown voltage of the CMOS process, and exceeding
it will compromise the reliability of the DAC2932, or even
cause permanent damage. With the full-scale output set to
2mA, the positive compliance equals 0.8V, operating with
an analog supply of +VA = 3V. To avoid degradation of the
distortion performance and integral linearity, care must be
taken so that the configuration of the DAC2932 does not
exceed the compliance range.
Best distortion performance is typically achieved with the
maximum full-scale output signal limited to approximately
0.5VPP. This is the case for a 250load and a 2mA
full-scale output current. A variety of loads can be adapted
to the output of the DAC2932 by selecting a suitable
transformer while maintaining optimum voltage levels at
IOUT and IOUT. Furthermore, using the differential output
configuration in combination with a transformer is
instrumental in achieving excellent distortion
performance. Common-mode errors, such as even-order
harmonics or noise, can be substantially reduced. This is
particularly the case with high output frequencies.
For those applications requiring the optimum distortion
and noise performance, it is recommended to select a
full-scale output of 2mA. A lower full-scale range down to
OUTPUT CONFIGURATIONS
As mentioned previously, utilizing the differential outputs
of the converter yields the best dynamic performance.
Such a differential output circuit may consist of an RF
transformer or a differential amplifier configuration. The
transformer configuration is ideal for most applications
with ac coupling, while op amps are suitable for a
dc-coupled configuration.
The single-ended configuration may be considered for ap-
plications requiring a unipolar output voltage. Connecting a
resistor from either one of the outputs to ground converts the
output current into a ground-referenced voltage signal. To im-
prove on the dc linearity by maintaining a virtual ground, an
I-to-V or op-amp configuration may be considered.
DIFFERENTIAL WITH TRANSFORMER
Using an RF transformer provides a convenient way of
converting the differential output signal into a single-ended
signal while achieving excellent dynamic performance
(see Figure 3). The appropriate transformer should be
carefully selected based on the output frequency spectrum
and impedance requirements. The differential transformer
configuration has the benefit of significantly reducing
common-mode signals, thus improving the dynamic
performance over a wide range of frequencies.
Furthermore, by selecting a suitable impedance ratio
(winding ratio), the transformer can be used to provide
optimum impedance matching while controlling the
compliance voltage for the converter outputs. The model
shown, ADT16-6T (by Mini-Circuits), has a 4:1 ratio and
may be used to interface the DAC2932 to a 50load. This
results in a 400load for each of the outputs, IOUT and
IOUT. The output signals are ac coupled and inherently
isolated by the transformer.
16










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