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零件编号 | 74V2T132 | ||
描述 | DUAL 2-INPUT SHMITT TRIGGER NAND GATE | ||
制造商 | STMicroelectronics | ||
LOGO | |||
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74V2T132
DUAL 2-INPUT SHMITT TRIGGER NAND GATE
s HIGH SPEED: tPD = 3.7 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 1 µA (MAX.) at TA = 25°C
www.DataSheet4U.csomTYPICAL HYSTERESIS: 0.8V at VCC = 4.5V
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 4.5V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V2T132 is an advanced high-speed CMOS
SINGLE 2-INPUT NAND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology.
Pin configuration and function are the same as
those of the 74V2T00 but the 74V2T132 has
hysteresis.
SOT23-8L
ORDER CODES
PACKAGE
SOT23-8L
T&R
74V2T132STR
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 2003
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页数 | 7 页 | ||
下载 | [ 74V2T132.PDF 数据手册 ] |
零件编号 | 描述 | 制造商 |
74V2T132 | DUAL 2-INPUT SHMITT TRIGGER NAND GATE | STMicroelectronics |
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