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PDF ( 数据手册 , 数据表 ) TB1311AFG

零件编号 TB1311AFG
描述 Sync Separation and H/V Frequency Counter IC
制造商 Toshiba Semiconductor
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TB1311AFG 数据手册, 描述, 功能
TOSHIBA Bi-CMOS Integrated Circuit Silicon Monolithic
TB1311AFG
TB1311AFG
Audio SW, Video SW, Sync Separation and H/V Frequency Counter IC for TVs
The TB1311AFG includes audio and video SW blocks, prefilters
for A/D converters, sync separators, and an H/V format detector for
TV signals.
The TB1311AFG contributes to a reduction in the proportion of the
PCB occupied by LCR filters and to the simplification of designs on
www.DataSheet4U.comanalog interfaces.
The TB1311AFG has an I2CBUS interface through which various
functions can be controlled.
P-QFP80-1420-0.80C
Weight: 1.6 g (typ.)
Features
Audio SW block
Audio (L/R) inputs
Audio (L/R) output: 3 channels
Audio block
Attenuator
Video SW block
CVBS inputs
Y/C inputs
Component video inputs (co-use as RGB inputs)
SCART inputs
Output: 2 channels
Monitor output
Video block
Gain switching: -3 dB / 0 dB / +3 dB
Bandwidth filter: prefilter for ADC; 4.5 to 46 MHz variable
Sync separation block
Supports 525/30p/60i/60p, 625/50i/50p, 750/50p/60p, 1125/24p/24sf/25p/30p/50i/60i/50p/60p, 1250/50i,
VGA @60, SVGA@60, XGA@60, SXGA@60, UXGA@60
HD/VD input: 1 channel; positive and negative input acceptable
HD/VD output: positive and negative output selectable
Masking pseudo-sync for the copyguard signal
Others
Line detector for Japanese D-pin
S2, S1, insertion detection for S-pin
Horizontal and vertical frequency counter
Format detection circuit to input signal
No-input detection
Automatic sync process switching mode
Programmable number of audio/video inputs
1 2006-05-29







TB1311AFG pdf, 数据表
Pin
No.
Pin Name
Function
45 Cr1/R1 IN
65 Cr2/R2 IN
Cr, R or C input pin.
Input the signal via a capacitor.
51 Cr3/R3 IN
71 Cr4/R4 IN
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35 AR1 IN
37 AL1 IN
42 AR2 IN
43 AL2 IN
52 AR3 IN
54 AL3 IN
56 AR4 IN
58 AL4 IN
62 AR5 IN
63 AL5 IN
72 AR6 IN
74 AL6 IN
76 AR7 IN
78 AL7 IN
Cr, R or CVBS input pin.
Input the signal via a capacitor.
The clamp system is changed according to
CbCr PIN3 or 4 registers.
Audio input pin.
Input the signal via a resistor and a
capacitor. When the resistor value is 5.6 k,
the internal gain becomes 0 dB (typ.).
39 AR8 IN/DC1
40 AL8 IN/DC2
46 AR9 IN/DC4
48 AL9 IN/DC5
66 AR10 IN/DC9
68 AL10 IN/DC10
Audio or DC voltage input pin.
The input type is changed by AU8 PIN, AU9
PIN or AU10 PIN.
In the case of use as audio input, input the
signal via a resistor and a capacitor. When
the resistor value is 5.6 k, the internal gain
becomes 0 dB (typ.).
In the case of use as DC voltage input, input
the signal via a resistor for protection.
44 FB1 IN/DC3
64 FB2 IN/DC8
50 FB3 IN/DC6
70 FB4 IN/DC11
FB (Fast Blanking) signal or DC voltage
input pin.
Connect a resistor between this pin and
GND.
In the case of use as DC voltage input, input
the signal via a resistor for protection.
Interface Circuit
11
51 200Ω
71
16
35 58
37 62
42 63
43 72
52 74
54 76
56 78
40.2kΩ
24
32
39
40
46 200Ω
48 40kΩ
66
68
24
76kΩ
32
11
Th1 Th2
16
60 DC7
80 DC12
DC voltage input.
Input the signal via a resistor for protection
purposes.
This pin is also used as a test signal output
pin for shipping only.
TB1311AFG
Input Signal/Output Signal
2.9 V bias (typ.)
Cr/R signal amplitude:
0.7 Vp-p (without sync)
Burst signal amplitude:
0.3 Vp-p
Sync tip level: 2.3 V (typ.)
Bias level: 2.9 V (typ.)
Cr/R signal amplitude:
0.7 Vp-p (without sync)
CVBS signal amplitude:
1.0 Vp-p (with sync)
Bias level: 4.4 V (typ.)
Audio input: 2.8 p-p (100%)
Bias level: 4.4 V (typ.)
Audio input: 2.8 p-p (100%)
FB input:
DC
8 2006-05-29







TB1311AFG equivalent, schematic
TB1311AFG
Register Name
HV FREQ2
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H COUNT MAX
H COUNT MIN
SIG DET N
SIG RESET N
SIG RESET
SIG SW
SIG DET IMPE
SIG DET LVL
TEST1,2,3
Function
Preset Value
Input format setting.
Set the horizontal and vertical mode according to the format that is input.
When A-SYNC = ON mode, this setting is invalid.
00000: 15.625 kHz, 50 Hz (625i)
00001: 15.75 kHz, 60 Hz (525i)
00010: 31.25 kHz, 50 Hz (625p)
00011: 31.5 kHz, 60 Hz (525p, VGA @60 Hz)
00100: 28.125 kHz, 50 Hz (1125/50i)
00101: 33.75 kHz, 60 Hz (1125/60i)
00110: 37.5 kHz, 50 Hz (750/50p)
00111: 45 kHz, 60 Hz (750/60p, XGA @60 Hz)
01000: 31.25 kHz, 50 Hz (1250i)
01001: 37.9 kHz, 60 Hz (SVGA @60 Hz)
01010: 64 kHz, 60 Hz (1125/60p, SXGA @60 Hz)
01011: 75 kHz, 60 Hz (UXGA @60 Hz)
01100: 56.25 kHz, 50 Hz (1125/50p)
01101 to 01111: Not available
10000: 15.734 kHz, 30 Hz (525/30p)
10001: 27 kHz, 24 Hz (1125/24p)
10010: 28.125 kHz, 25 Hz (1125/25p)
10011: 33.75 kHz, 30 Hz (1125/30p)
10100: 27 kHz, 48 Hz (1125/24sf)
10101 to 11111: Not available
15.625 kHz, 50 Hz
(00000)
Selects the H-sync count number for the higher threshold for the no-input detection.
32 counts
0000: 32 counts
1111: 62 counts
(2 counts / step)
(0000)
Selects the H-sync count number for the lower threshold for the no-input detection.
16 counts
000: 16 counts
111: 30 counts
(2 counts / step)
(000)
Selects the number of signal detections for the input existence threshold of the
no-input detection.
1 count
0000: 1 count
0001: 2 counts to 1111: 30 counts (2 counts / step)
(0000)
Selects the number of signal detection for input non-existence threshold of the
no-input detection.
1 count
0000: 1 count
0001: 2 counts to 1111: 30 counts (2 counts / step)
(0000)
Resets the counter for no-input detection.
When 1 is sent, the counter for no-input detection is cleared at that time.
0: Normal
1: Reset
Normal
(0)
Selects the input to the counter for no-input detection.
SYNC2-IN
0: SYNC2-IN (pin 15)
1: SYNC1-IN (pin 33)
(0)
Changes the internal impedance for no-input detection.
The time constant of LPF for no-input detection is changed by this function and the
capacitor value of SYNC FILTER (pin 14).
00: 20 k
10: 10 k
01: 15 k
11: 6 k
20 k
(00)
Changes the threshold for no-input detection.
00: 0.55 V
10: 1.05 V
01: 0.80 V
11: 1.30 V
0.55 V
(00)
Test modes for shipping test. Set all zero.
all 0
16 2006-05-29










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