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PDF ( 数据手册 , 数据表 ) XE88LC05A

零件编号 XE88LC05A
描述 16 + 10 bit Data Acquisition Ultra Low-Power Microcontroller
制造商 Xemics
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XE88LC05A 数据手册, 描述, 功能
Datasheet XE88LC05/05A Sensing
Machine Data Acquisition MCU
with Zooming ADC and DACs
www.DataSheet4U.com
XE88LC05/05A Sensing Machine
Data Acquisition with 16+10 bit ZoomingADC™
and buffered 16 and 8 bit DACs
General Description
The XE88LC05A is a data acquisition ultra low-
power low-voltage system on a chip (SoC) with a
high efficiency microcontroller unit embedded
(MCU), allowing for 1 MIPS at 300uA and 2.4 V,
and multiplying in one clock cycle.
The XE88LC05A includes a high resolution
acquisition path with the 16+10 bits ZoomingADC
and two buffered DACs.
The XE88LC05A is available with on chip ROM or
Multiple-Time-Programmable (MTP) program
memory.
Applications
Portable, battery operated instruments
Current loop powered instruments
Wheatstone bridge interfaces
Pressure and chemical sensors
HVAC control
Metering
Sports watches, wrist instruments
Key product Features
Low-power, high resolution ZoomingADC
0.5 to 1000 gain with offset cancellation
up to 16 bits analog to digital converter
up to 13 inputs multiplexer
Low-voltage low-power controller operation
2 MIPS with 2.4 V to 5.5 V operation
300 µA at 1 MIPS over voltage range
22 kByte (8 kInstruction) MTP
520 Byte RAM data memory
RC and crystal oscillators
5 reset, 22 interrupt, 8 event sources
8 bit and 16 bit buffered DACs
100 years MTP Flash retention at 55°C
Ordering Information
Product
Temperature range
XE88LC05MI028*
-40°C to 85 °C
XE88LC05AMI000
-40°C to 85 °C
XE88LC05AMI028
-40°C to 85 °C
XE88LC05ARE000 -40°C to 125 °C
XE88LC05ARE028
*Not for new designs
-40°C to 125 °C
Memory type
MTP
MTP
MTP
ROM
ROM
Package
LQFP64
die
LQFP64
die
LQFP64
Cool Solutions for Wireless Connectivity
XEMICS SA e-mail: [email protected] web: www.xemics.com







XE88LC05A pdf, 数据表
Datasheet
XE88LC05/05A
Package pin
21
22
23
24
25
26
27
28
29
30
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31
32
name
PB(4)
PB(5)
PB(6)
PB(7)
DAB_R_P
DAB_R_M
DAB_OUT
DAB_AO_P
DAB_AO_M
DAB_AI_P
DAB_AI_M
NC
Package pin
53
54
55
56
57
58
59
60
61
62
63
64
name
DAS_AI_M
DAS_AO
VBAT
VSS
VSS_REG
VREG
NC
VMULT
RESET
OSCOUT
OSCIN
NC
Table 1-1. Bonding plan of the LQFP-64 package (LQFP 64L 10x10mm thick 1.6 mm)
1.3 Pin assignment
The table below gives a short description of the different pin assignments.
Pin
VBAT
VSS VSS_REG
VREG
VPP/TEST
RESET
OSCIN/OSCOUT
PA(7:0)
PB(7:0)
PC(7:0)
AC_A(7:0)
AC_R(3:0)
VMULT
DAB_OUT
DAB_R_x
DAB_Ax_y
DAS_OUT
DAS_AI_x
DAS_AO
Assignment
Positive power supply
Negative power supply
Connection for the mandatory external capacitor of the voltage regulator
High voltage supply for flash memory programming (NC in ROM versions)
Resets the circuit when the voltage is high
Quartz crystal connections, also used for flash memory programming
Parallel input port A pins
Parallel I/O port B pins
Parallel I/O port C pins
Acquisition chain input pins
Acquisition chain reference pins
Connection for the external capacitor if VBAT is below 3V
Bias D/A output
Bias D/A reference (x=P: plus, x=M: minus)
Bias D/A amplifier IO (x=I: input, x=O: output ; y=P: plus, y=M: minus)
Signal D/A output
Signal D/A amplifier inputs (x=P: plus, x=M: minus)
Signal D/A amplifier output
Table 1-2. Pin assignment
Table 1-3 gives a more detailed pin map for the different pins. It also indicates the possible I/O
configuration of these pins. The indications in blue bold are the configuration at start-up.
The pins CNTx pins are possible counter inputs, PWMx are possible PWM outputs.
1-6 D0304-40







XE88LC05A equivalent, schematic
Datasheet
XE88LC05/05A
2.5 Operating speed
2.5.1
Flash version
The speed of the devices is not highly dependent upon the supply voltage. However, by limiting the
temperature range, the speed can be increased. The minimal guaranteed speed as a function of the
supply voltage and maximal temperature operating temperature is given in Figure 2-5.
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4
3
2
1
85°C
45°C
0
2 2.5 3 3.5 4 4.5 5 5.5
supply voltage VBAT (V)
Figure 2-5. Guaranteed speed as a function of the supply voltage and maximal temperature.
2.5.2
ROM circuit version
2.5.2.1 Low power supply configuration
In the low power supply configuration as shown in Figure 2-2, the operating speed does not depend
highly on the supply voltage as shown in Figure 2-6.
85°C
45°C
125°C
3.5
3
2.5
2
1.5
1
0.5
0
2 2.5 3 3.5 4 4.5 5 5.5
supply voltage VBAT (V)
Figure 2-6. Guaranteed speed as a function of supply voltage and for different maximal temperatures
using the voltage regulator.
2.5.2.2 High speed supply configuration
In the high speed supply configuration of Figure 2-3, the guaranteed speed of the circuit is shown in
Figure 2-7.
2-6 D0304-40










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