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PDF ( 数据手册 , 数据表 ) ML145151

零件编号 ML145151
描述 (ML145151 - ML145158) Parallel-Input PLL Frequency Synthesizer Interfaces
制造商 LANSDALE Semiconductor
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ML145151 数据手册, 描述, 功能
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ML145151 ML145156
ML145152 ML145157
ML145155 ML145158
PLL Frequency Synthesizer Family - CMOS
The devices described in this document are typically used as low–power, phase–locked loop frequency
synthesizers. When combined with an external low–pass filter and voltage–controlled oscillator, these
devices can provide all the remaining functions for a PLL frequency synthesizer operating up to the
device's frequency limit. For higher VCO frequency operation, a down mixer or a prescaler can be used
between the VCO and the synthesizer IC.
These frequency synthesizer chips can be found in the following and other applications:
CATV
TV Tuning
AM/FM Radios
Scanning Receivers
Two–Way Radios
Amateur Radio
OSC ÷R
CONTROL LOGIC
φ
÷ A ÷N
÷ P/P + 1
VCO
OUTPUT
FREQUENCY
EXTERNAL
COMPONENTS
CONTENTS
Page
DEVICE DETAIL SHEETS
ML145151 Parallel–Input, Single–Modulus ...........................................................................................2
ML145152 Parallel–Input, Dual–Modulus..............................................................................................5
ML145155 Serial–Input, Single–Modulus ..............................................................................................9
ML145156 Serial–Input, Dual–Modulus...............................................................................................13
ML145157 Serial–Input, Single–Modulus ............................................................................................17
ML145158 Serial–Input, Dual–Modulus...............................................................................................20
FAMILY CHARACTERISTICS
Maximum Ratings..................................................................................................................................23
DC Electrical Characteristics.................................................................................................................23
AC Electrical Characteristics.................................................................................................................25
Timing Requirements.............................................................................................................................26
Frequency Characteristics ......................................................................................................................27
Phase Detector/Lock Detector Output Waveforms................................................................................27
DESIGN CONSIDERATIONS
Phase–Locked Loop – Low–Pass Filter Design ....................................................................................28
Crystal Oscillator Considerations ..........................................................................................................29
Dual–Modulus Prescaling......................................................................................................................30
Page 1 of 35
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Issue A







ML145151 pdf, 数据表
LANSDALE Semiconductor, Inc.
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ML145152
REF. OSC.
15.360 MHz
(ON–CHIP OSC.
OPTIONAL)
X2
OSCout
OSCin
+ V VDD
VSS
N9
NO CONNECTS
“1” “1” “1”
RA2 RA1 RA0
ML145152
NOTE 5
N0 A5
RECEIVER 2ND L.O.
30.720 MHz
LOCK DETECT SIGNAL
R2 C
LD
φR
φV
R1
R1
MC
fin
A0
+
NOTE 7
R2
C
RECEIVER FIRST L.O.
825.030 844.980 MHz
(30 kHz STEPS)
VCO
X4
NOTE 6
TRANSMITTER
MODULATION
X4
NOTE 6
ML12017
CHANNEL PROGRAMMING
÷ 64/65 PRESCALER
NOTE 6
TRANSMITTER SIGNAL
825.030 844.980 MHz
NOTES:
(30 kHz STEPS)
1. Receiver 1st I.F. = 45 MHz, low side injection; Receiver 2nd I.F. = 11.7 MHz, low side injection.
2. Duplex operation with 45 MHz receiver/transmit separation.
3. fR = 7.5 kHz; ÷ R = 2048.
4. Ntotal = N 64 + A = 27501 to 28166; N = 429 to 440; A = 0 to 63.
5. ML145158 may be used where serial data entry is desired.
6. High frequency prescalers may be used for higher frequency VCO and fref
implementations.
7. The φR and φV outputs are fed to an external combiner/loop filter. See the Phase–Locked Loop — Low–Pass Filter Design page for
additional information. The φR and φV outputs swing rail–to–rail. Therefore, the user should be careful not to exceed the common mode
input range of the op amp used in the combiner/loop filter.
Figure 2. 666–Channel, Computer–Controlled, Mobile Radiotelephone Synthesizer
for 800 MHz Cellular Radio Systems
Page 8 of 35
ML145152 Data Sheet Continued on Page 23
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Issue A







ML145151 equivalent, schematic
ML145156
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3.2 MHz
ML145156
TYPICAL APPLICATIONS
LOCK DETECT SIGNAL
+ 12 V
NOTES 1
AND 2
+ 12 V
LANSDALE Semiconductor, Inc.
FM B +
+ V OSCin OSCout RA2 RA1 RA0 LD SW1 SW2 OPTIONAL
AM B +
VDD
PDout
LOOP
ERROR SIGNAL
VSS
ML145156
φR
VCO
REFout
CLK DATA ENB fin
φV
MC
+
1/2 MC1458
NOTE 3
KEY–
BOARD
CMOS MPU/MCU
ML12019
÷ 20/21 DUAL MODULUS PRESCALER
TO DISPLAY DRIVER (e.g., MC14489)
NOTES:
1. For AM: channel spacing = 5 kHz, ÷ R = ÷ 640 (code 100).
2. For FM: channel spacing = 25 kHz, ÷ R = ÷ 128 (code 010).
3. The φR and φV outputs are fed to an external combiner/loop filter. See the Phase–Locked Loop – Low–Pass Filter Design page
for additional information. The φR and φV outputs swing rail–to–rail. Therefore, the user should be careful not to exceed the
common mode input range of the op amp used in the combiner/loop filter.
Figure 1. AM/FM Radio Broadcast Synthesizer
3.2 MHz (NOTE 3)
NAV = 01
COM = 10
LOCK DETECT SIGNAL
+V
OSCin OSCout
VDD
VSS
RA2 RA1 RA0 LD SW1 SW2
PDout
ML145156
φR
REFout
CLK DATA ENB fin
φV
MC
VCO RANGE
NAV: 97.300 – 107.250 MHz
COM–T: 118.000 – 135.975 MHz
COM–R: 139.400 – 157.375 MHz
+
MC33171
NOTE 5
VCO
R/T CMOS MPU/MCU
ML12016 (NOTES 2 AND 4)
÷ 40/41 DUAL MODULUS PRESCALER
CHANNEL TO DISPLAY DRIVER
SELECTION
(e.g., MC14489)
NOTES:
1. For NAV: fR = 50 kHz, ÷ R = 64 using 10.7 MHz lowside injection, Ntotal = 1946 – 2145.
For COM–T: fR = 25 kHz, ÷ R = 128, Ntotal = 4720 – 5439.
For COM–R: fR = 25 kHz, ÷ R = 128, using 21.4 MHz highside injection, Ntotal = 5576 – 6295.
2. A ÷ 32/33 dual modulus approach is provided by substituting an ML12015 for the ML12016. The devices are pin equivalent.
3. A 6.4 MHz oscillator crystal can be used by selecting ÷ R = 128 (code 010) for NAV and ÷ R = 256 (code 011) for COM.
4. ML12013 + MC10131 combination may also be used to form the ÷ 40/41 prescale.r
5. The φR and φV outputs are fed to an external combiner/loop filter. See the Phase–Locked Loop – Low–Pass Filter Design
page for additional information. The φR and φV outputs swing rail–to–rail. Therefore, the user should be careful not to exceed
the common mode input range of the op amp used in the combiner/loop filter.
Figure 2. Avionics Navigation or Communication Synthesizer
ML145156 Data Sheet Continued on Page 23
Page 16 of 35
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Issue A










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零件编号描述制造商
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ML145155(ML145151 - ML145158) Parallel-Input PLL Frequency Synthesizer InterfacesLANSDALE Semiconductor
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