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零件编号 | D78320L | ||
描述 | UPD78320L | ||
制造商 | NEC | ||
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD78320,78322
16/8-BIT SINGLE-CHIP MICROCONTROLLER
DESCRIPTION
The µPD78322 is a 16-/8-bit single-chip microcontroller that incorporates a high-performance 16-bit CPU. The µPD78322
is one of 78K/III series.
A realtime pulse unit for realtime pulse control required in motor control, an A/D converter, a ROM, and a RAM have been
integrated into one chip.
The µPD78322 incorporates 16K-byte mask ROM and 640-byte RAM.
The µPD78320 is provided as a ROM-less product of the µPD78322. Also, the µPD78P322 is provided as an on-chip
PROM product.
Detailed information about product features and specifications can be found in the following document.
µPD78322 User’s Manual : IEU-1248
FEATURES
• Internal 16-bit architecture and external 8-bit data bus
• High-speed processing by pipeline control and instruction prefetch
• Minimum instruction execution time: 250 ns (with 16 MHz external clock in operation)
• Instruction set suitable for control operations (µPD78312 upward compatible)
• Multiplication/division instruction (16 bits × 16 bits, 32 bits ÷ 16 bits)
• Bit manipulation instruction
• String instruction, etc.
• On-chip high-function interrupt controller
• 3-level priority specifiable
• 3-type interrupt servicing mode selectable
(Vectored interrupt function, context switching function, and macro service function)
• Variety of peripheral hardware
• Realtime pulse unit
• 8-channel, 10-bit A/D converter
• Watchdog timer
• Powerful serial interface (with an on-chip dedicated baud rate generator)
• UART
····· 1 channel
• SBI (NEC Standard Serial Bus Interface)
• 3-wire serial I/O
····· 1 channel
APPLICATIONS
• Motor control devices
Unless there are any particular notices, the µPD78322 is described as the representative model in this document.
The information in this document is subject to change without notice.
Document No. U10455EJ7V0DS00 (7th edition)
(Previous No. IC-2354)
Date Published November 1995 P
Printed in Japan
The mark shows major revised points.
© 1989
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µPD78320, 78322
DIFFERENCES BETWEEN µPD78322 AND 78320
Item
Product Name
Internal ROM
µPD78322
16K bytes
µPD78320
None
I/O line
Input
Input
/output
16 (dual-function as analog input: 8)
39
21
Port 4
(P40 to P47)
Specifiable as I/O as an 8-bit unit.
Functions as multiplexed address/data buses
(AD0 to AD7) in the external memory expansion
mode.
Functions always as multiplexed address/data
buses.
Port 5
(P50 to P57)
Specifiable as I/O bit-wise.
Functions as address bus (A8 to A15) in the
external memory expansion mode.
Functions always as address bus.
Port 9
(P90 to P93)
Specifiable as I/O bit-wise.
In the external memory expansion mode, P90
and P91 function as RD strobe signal output and
WR strobe signal output, respectively. In the
external memory high-speed fetch mode, P92
and P93 function as TAS output and TMD
output, respectively.
Memory expansion
mode register (MM)
Port 4 I/O mode is set as an 8-bit unit .
Port 5 mode register
Port 5 I/O mode is set bit-wise.
(PM5)
Always P90 and P91 function as RD strobe and
WR strobe signal output, respectively.
In the µPD78322 emulation mode, turbo
access manager (µPD71P301)Note PA and PB pins
are controlled as port 4 and port 5 emulation
pins.
Note Maintenance product
8
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Type 1
IN
Type 2
IN
Figure 1-1. Pin Input/Output Circuits
VDD
P-ch
N-ch
Type 5
data
output
disable
input
enable
Type 8
data
output
disable
µPD78320, 78322
VDD
P-ch
N-ch
IN/OUT
VDD
P-ch
N-ch
IN/OUT
Schmitt-triggered input having hysteresis characteristics.
Type 3
Type 9
VDD
P-ch
OUT
IN
N-ch
Type 4
data
output
disable
VDD
P-ch
OUT
N-ch
Push-pull output which can become high-impedance
output (with both P-ch and N-ch set to off)
P-ch
N-ch
Comparator
+
–
Vref
(Threshold Voltage)
input
enable
16
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页数 | 30 页 | ||
下载 | [ D78320L.PDF 数据手册 ] |
零件编号 | 描述 | 制造商 |
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