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PDF ( 数据手册 , 数据表 ) 8560GP

零件编号 8560GP
描述 LUCL8560GP
制造商 Agere Systems
LOGO Agere Systems LOGO 


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8560GP 数据手册, 描述, 功能
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April 2000
L8560 Low-Power SLIC with Ringing
Features
Description
s Full-feature set for central office applications
s Also ideal for ISDN terminal adapters, pair gain,
and cable telephony applications
s Auxiliary input for second battery, and internal
switch to enable its use to save power in short tele-
phone loops
s 5 V only operation or optional ±5 V operation for
reduced power consumption
s Low active power (85 mW typical) and scan power
(61 mW typical) with 5 V only operation
s Low active power (68 mW typical with auxiliary bat-
tery) and scan power (45 mW typical) with ±5 V
operation
s Quiet tip/ring polarity reversal
s Per-line ringing available for short loops
s Reduced overhead and increased current limit dur-
ing ring mode for lower-battery operation or
increased ring loop length
s Supports meter pulse injection
s Distortion-free full duplex from 0 mA dc loop cur-
rent on-hook transmission
s Convenient operating states:
— Forward powerup
— Polarity reversal powerup
— Forward sleep
— Ground start
— Disconnect
s Adjustable supervision functions:
— Off-hook detector with longitudinal rejection
— Ground key detector with longitudinal rejection
— Ring trip detector
s Independent, adjustable dc and ac parameters:
— dc feed resistance (44-pin PLCC version)
— Loop current limit
— Termination impedance
s Thermal protection
The L8560 full-feature, low-power subscriber line
interface circuit (SLIC) is optimized for low power
consumption while providing an extensive set of fea-
tures. This part is ideal for ISDN terminal adapter
applications and short-loop, power-sensitive applica-
tions such as pair gain and cable telephony. This part
is also designed for PBX, DLC, or CO applications.
The SLIC includes an auxiliary battery input and a
battery switch. In short-loop applications, SLICs can
be used in high battery to present a high on-hook
voltage, and then switched to low battery to reduce
off-hook power.
To help minimize the required auxiliary battery volt-
age, the dc feed resistance and overhead voltage are
set at 55 and 6.7 V, respectively. This allows an
undistorted on-hook transmission of a 3.14 dBm sig-
nal into a 900 loop impedance.
The device offers the reverse battery function. Using
the reverse battery, the device can provide a bal-
anced power ring signal to tip and ring. In this
mode of operation, the battery switch is used to
apply a high-voltage battery during ringing and a
lower-voltage battery during the talk and idle states.
Also included in the L8560 is a dc current-limit
switch, which increases the dc current limit during
power ringing. In addition, dc overhead voltage is
reduced during the ring state. With the battery and
current-limit switches, and overhead reduction, the
L8560 can provide sufficient power to ring a true
North American 5 REN load of 1386 + 40 µF.
The device offers ring trip and loop closure supervi-
sion with 0.3 V and 2 mA hysteresis, respectively. It
also includes the ground start state and ring ground
detection. A summing node for meter pulse injection
to 2.2 Vrms is also included. The 44-pin PLCC ver-
sion also has a spare uncommitted op amp, which
may be used for ac gain setting or meter pulse filter-
ing.







8560GP pdf, 数据表
www.DataSheet4U.com
L8560 Low-Power SLIC with Ringing
Data Sheet
April 2000
Pin Information (continued)
Table 2. Pin Descriptions (continued)
32-Pin 44-Pin
— 24
26 25
27 26
28 27
29 28
29
— 30
— 31
30 32
31 33
32 34
1 35
2—
2
— 36
3 37
4 38
5 39
— 40
6 41
7 42
8 43
— 44
Symbol
NC
B2
B1
B0
BR
NC
NC-NTP
NC
TG
VTX
TXI
NSTAT
VEE
NC
NC
VITR
RCVP
RCVN
NC
FB2
FB1
LCTH
DCR
Type
Description
No Connection. May be used as a tie point.
I State Control Input. B0, B1, B2, and BR determine the state of the SLIC.
See Table 3. Pin B2 has a 40 kpull-up.
I State Control Input. B0, B1, B2, and BR determine the state of the SLIC.
See Table 3. Pin B1 has a 40 kpull-up.
I State Control Input. B0, B1, B2, and BR determine the state of the SLIC.
See Table 3. Pin B0 has a 40 kpull-up.
I State Control Input. B0, B1, B2, and BR determine the state of the SLIC.
See Table 3. Pin BR has a 40 kpull-up.
No Connection. May be used as a tie point.
No Connection. May not be used as a tie point.
No Connection. May be used as a tie point.
Transmit Gain. Connect a 4.32 kresistor from this pin to VTX.
O The voltage at this pin is directly proportional to the differential tip/ring current.
ac/dc Separation. Connect a 0.1 µF capacitor from this pin to VTX.
O Loop Detector Output/Ring Trip Detector Output. This output is a wired-
OR of the NLC/NRDET outputs. When low, this logic output indicates that an
off-hook condition exists or that ringing has been tripped.
–5 V Power Supply L8560C.
No Connection L8560A/D/F. May be used as a tie point.
No Connection. May be used as a tie point.
O ac Output Voltage. This output is a voltage that is directly proportional to the
differential ac tip/ring current.
I Receive ac Signal Input (Noninverting). This high-impedance input con-
trols the ac differential voltage on tip and ring.
I Receive ac Signal Input (Inverting). This high-impedance input controls the
ac differential voltage on tip and ring.
No Connection. May be used as a tie point.
Polarity Reversal Slowdown. Connect a capacitor to ground.
Polarity Reversal Slowdown. Connect a capacitor to ground.
I Loop Closure Threshold Input. Connect a resistor to DCOUT to set off-
hook threshold.
I dc Resistance. Short to analog ground for dc feed resistance of 55 . The dc
feed resistance can be increased to a nominal 760 by shorting DCR to
DCOUT. Intermediate values can be set by a simple resistor divider from
DCOUT to ground with the trip at DCR (44-pin PLCC only).
8 Lucent Technologies Inc.







8560GP equivalent, schematic
www.DataSheet4U.com
L8560 Low-Power SLIC with Ringing
Data Sheet
April 2000
Electrical Characteristics (continued)
Table 10. Logic Inputs and Outputs
Parameter
Input Voltages:
Low Level (permissible range)
High Level (permissible range)
Input Currents:
Low Level (VCC = 5.25 V, VI = 0.4 V)
High Level (VCC = 5.25 V, VI = 2.4 V)
Output Voltages (open collector with internal pull-up resistor):
Low Level (VCC = 4.75 V, IOL = 360 µA)
High Level (VCC = 4.75 V, IOH = –20 µA)
Symbol
VIL
VIH
IIL
IIH
VOL
VOH
Min
–0.5
2.0
–75
–40
0
2.4
Typ
0.4
2.4
–115
–60
0.2
Max
0.7
VCC
–300
–100
0.4
VCC
Unit
V
V
µA
µA
V
V
Ring Trip Requirements
s Ringing signal:
— Voltage, minimum 35 Vrms, maximum 100 Vrms.
— Frequency, 17 Hz to 23 Hz.
— Crest factor, 1.4 to 2.
s Ringing trip:
100 ms (typical), 250 ms (VBAT = –33 V, loop
length = 530 ).
s Pretrip:
— The circuits in Figure 4 will not cause ringing trip.
200
TIP
SWITCH CLOSES < 12 ms
6 µF PER TA 909
8 µF PER TR 57
TIP
10 k
RING
RING
2 µF
100
TIP
RING
12-2572.e (F)
Figure 4. Ring Trip Circuits
16 Lucent Technologies Inc.










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