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PDF ( 数据手册 , 数据表 ) 87C196KC

零件编号 87C196KC
描述 Commercial / Express CHMOS Microcontroller
制造商 Intel
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87C196KC 数据手册, 描述, 功能
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8XC196KC/8XC196KC20
COMMERCIAL/EXPRESS CHMOS
MICROCONTROLLER
87C196KC-16 Kbytes of On-Chip OTPROM
83C196KC-16 Kbytes ROM
80C196KC-ROMless
Y 16 and 20 MHz Available
Y 488 Byte Register RAM
Y Register-to-Register Architecture
Y 28 Interrupt Sources/16 Vectors
Y Peripheral Transaction Server
Y 1.4 ms 16 x 16 Multiply (20 MHz)
Y 2.4 ms 32/16 Divide (20 MHz)
Y Powerdown and Idle Modes
Y Five 8-Bit I/O Ports
Y 16-Bit Watchdog Timer
Y Extended Temperature Available
Y Dynamically Configurable 8-Bit or
16-Bit Buswidth
Y Full Duplex Serial Port
Y High Speed I/O Subsystem
Y 16-Bit Timer
Y 16-Bit Up/Down Counter with Capture
Y 3 Pulse-Width-Modulated Outputs
Y Four 16-Bit Software Timers
Y 8- or 10-Bit A/D Converter with
Sample/Hold
Y HOLD/HLDA Bus Protocol
Y OTPROM One-Time Programmable
Version
The 80C196KC 16-bit microcontroller is a high performance member of the MCS 96 microcontroller family.
The 80C196KC is an enhanced 80C196KB device with 488 bytes RAM, 16 and 20 MHz operation and an
optional 16 Kbytes of ROM/OTPR OM. Intel's CHMOS III process provides a high performance processor
along with low power consumption.
The 87C196KC is an 80C196KC with 16 Kbytes on-chip OTPROM. The 83C196KC is an 80C196KC with 16
Kbytes factory programmed ROM. In this document, the 80C196KC will refer to all products unless otherwise
stated.
Four high-speed capture inputs are provided to record times when events occur. Six high-speed outputs are
available for pulse or waveform generation. The high-speed output can also generate four software timers or
start an A/D conversion. Events can be based on the timer or up/down counter.
With the commercial (standard) temperature option, operational characteristics are guaranteed over the tem-
perature range of 0 C to a70 C. With the extended (Express) temperature range option, operational charac-
teristics are guaranteed over the temperature range of b40 C to a85 C. Unless otherwise noted, the specifi-
cations are the same for both options.
See the Packaging information for extended temperature designators.
Other brands and names are the property of their respective owners.
Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or
copyright, for sale and use of Intel products except as provided in Intel's Terms and Conditions of Sale for such products. Intel retains the right to make
changes to these specifications at any time, without notice. Microcomputer Products may have minor variations to this specification known as errata.
COPYRIGHT © INTELCORPORATION,2004
July 2004
Order Number:270942-006







87C196KC pdf, 数据表
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8XC196KC/8XC196KC20
PIN DESCRIPTIONS (Continued)
Symbol
Ports 3 and 4
HOLD
HLDA
BREQ
PMODE
PACT
CPVER
PALE
PROG
PVER
AINC
Name and Function
8-bit bidirectional I/O ports with open drain outputs. These pins are shared with the
multiplexed address/data bus which has strong internal pullups.
Bus Hold input requesting control of the bus.
Bus Hold acknowledge output indicating release of the bus.
Bus Request output activated when the bus controller has a pending external memory
cycle.
Determines the EPROM programming mode.
A low signal in Auto Programming mode indicates that programming is in process. A high
signal indicates programming is complete.
Cummulative Program Output Verification. Pin is high if all locations have programmed
correctly since entering a programming mode.
A falling edge in Slave Programming Mode and Auto Configuration Byte Programming Mode
indicates that ports 3 and 4 contain valid programming address/command information
(input to slave).
A falling edge in Slave Programming Mode indicates that ports 3 and 4 contain valid
programming data (input to slave).
A high signal in Slave Programmig Mode and Auto Configuration Byte Programming Mode
indicates the byte programmed correctly.
Auto Increment. Active low input signal indicates that the auto increment mode is enabled.
Auto Increment will allow reading or writing of sequential EPROM locations without address
transactions across the PBUS for each read or write.
8







87C196KC equivalent, schematic
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8XC196KC/8XC196KC20
Maximum Hold Latency
Bus Cycle Type
Internal Execution
1.5 States
16-Bit External Execution
2.5 States
8-Bit External Execution
4.5 States
EXTERNAL CLOCK DRIVE (8XC196KC)
Symbol
Parameter
1/T XLXL
TXLXL
TXHXX
TXLXX
TXLXH
TXHXL
Oscillator Frequency
Oscillator Period
High Time
Low Time
Rise Time
Fall Time
Min
8
62.5
20
20
Max
16.0
125
10
10
270942 ±36
Units
MHz
ns
ns
ns
ns
ns
16










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