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PDF ( 数据手册 , 数据表 ) RD151TS501US

零件编号 RD151TS501US
描述 PLL clock generator series
制造商 Renesas Technology
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RD151TS501US 数据手册, 描述, 功能
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RD151TS501US
PLL clock generator series
REJ03D0897-0102
Rev.1.02
Apr 25, 2007
Description
RD151TS501US is phase-locked loop clock generator with high-performance. And RD151TS501US is low-jitters and
will enable high density mounting by shrink small-size package (SSOP-8).
Features
Input frequency:
Output frequency:
27.0 to 36.0 MHz
54.0 to 72.0 MHz (1 : 2), 67.5 to 72.0 MHz (1 : 2.5)
27.0 to 36.0 MHz (1 : 1), 33.75 to 36.0 MHz (1 : 1.25) (Selectable)
Key Specifications
Supply voltages: VDD = 2.7 to 3.6 V
Operating temperature = -10 to 75 °C
Cycle to cycle jitter = ±75 ps typ.
Clock output duty cycle = 50±5%
Stabilization time: 2ms max
Power-down mode is supported
Ordering Information
Part Name
Package Type
RD151TS501USE
SSOP-8 pin
Package Code
(Previous Package Code)
PVSP0008KA–A
(TTP-8DBV)
Package
Abbreviation
US
Taping
Abbreviation (Quantity)
E (3,000 pcs / Reel)
Pin Arrangement
VDD 1
8 DIV2
VDD 2
7 IN
VSS 3
6 SEL
OUT 4
(Top view)
5 PDWN
REJ03D0897-0102 Rev.1.02 Apr 25, 2007
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