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零件编号 | V6123 | ||
描述 | Mux LCD Driver | ||
制造商 | EM Microelectronic | ||
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R EM MICROELECTRONIC - MARIN SA
V6123
Digitally Programmable 2,4 and 8 multiplex LCD Driver
Description
The V6123 is low multiplex LCD driver. The 2, 4 and 8
way multiplex is digitally programmable by the command
byte. The display refresh is handled on chip by an internal
RC oscillator via 1 selectable 8 x 60 RAM which holds the
LCD content driven by the driver. LCD pixels (or
segments) are addressed on a one to one basis with the 8
x 60 bit RAM (a set bit corresponds to an activated LCD
pixel).
The V6123 has very low dynamic current consumption,
typically 175 µA at VDD = 5V, VLCD = 7V making it
particularly attractive for portable and battery powered
products. The wide operating range on supply voltages
and temperature offers much application flexibility. The
LCD bias generation and frame frequency are generated
on chip. The clock signal can be used to shift and to latch
the datas into the RAM.
Applications
Automotive displays
Telephones
Pagers
Portable, battery operated products
Large displays (public information panels etc.)
Balances and scales
Utility meters
Typical Operating Conditions
Features
Very simple 1-bit interface (see Fig.1)
V6123 mux mode 2 with 2 rows and 58 columns
V6123 mux mode 4 with 4 rows and 56 columns
V6123 mux mode 8 with 8 rows and 52 columns
Very simple1-bit interface, reduced to its simplest form
Frame frequency on chip by internal RC oscillator
Voltage bias and mux signal generation on chip
1 display RAM addressable as 8 X 60 bit words
Column driver only mode to have 60 column outputs
No busy states
No external components needed
Blank function for LCD blanking
Bit mapped
Wide VDD voltage supply range, 2 to 6V
Wide VLCD voltage supply range, 2 to 8.5V
-40°C to +85°C temperature range
Pad Assignment
Fig. 1
Copyright © 2004, EM Microelectronic-Marin SA
1
Fig. 2
www.emmicroelectronic.com
R
Row and Column Multiplexing Waveform V6123 (4)
VOP = VLCD – VSS, VSTATE = VCOL - VROW
V6123
Copyright © 2004, EM Microelectronic-Marin SA
8
Fig. 8
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R
Table 9 cont.
Display Data
Bit No
Data
Command Byte
7654321
0111111
Bit 7, 6 = 0, 1 :
Bit 3 to 5 = 1, 1, 1 :
Bit 2 = 1 :
Bit 0,1 = 1,1 :
0
1
no set, BLANK
data sent to row 8 of the RAM
row and column driver configuration
mux 8
S1
S2
S3
S4
S5
S6
S7
S8
V6123
8 Bits "don't care"
= undefined
= pixel "OFF"
= pixel "ON"
Display Data
8 Bits "don't care"
Bit No
Data
Command Byte
7654321
1100011
Bit 7, 6 = 1, 1 :
Bit 3 to 5 = 0, 0, 0 :
Bit 2 = 1 :
Bit 0,1 = 1,1 :
0
1
no set, no blank Synchronize the chip at row 1
data sent to row 8 of the RAM, you have to rewrite row 8 of the RAM
row and column driver configuration
mux 8
S1
S2 = undefined
S3
S4 = pixel "OFF"
S5
S6 = pixel "ON"
S7
S8
Fig. 16.10
Fig. 16.11
Display Data
Bit No 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 ..
Data 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
8 Bits "don't care"
.. 20 19 18 17 16 15 14 13 12 11 10 9
00 000XXXXXXX
Bit No
Data
Command Byte
7654321
1111111
Bit 7, 6 = 1, 1 :
Bit 3 to 5 = 1, 1, 1 :
Bit 2 = 1 :
Bit 0,1 = 1,1 :
0
1
no set, no blank Synchronize the chip at row 1
data sent to row 3 of the RAM
row and column driver configuration
mux 8
S1
S2 = undefined
S3
S4 = pixel "OFF"
S5
S6 = pixel "ON"
S7
S8
8
X
Fig. 16.12
Copyright © 2004, EM Microelectronic-Marin SA
16
www.emmicroelectronic.com
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页数 | 19 页 | ||
下载 | [ V6123.PDF 数据手册 ] |
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