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PDF ( 数据手册 , 数据表 ) IA188EM

零件编号 IA188EM
描述 (IA186EM / IA188EM) 8/16-Bit Microcontrollers
制造商 InnovASIC
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IA188EM 数据手册, 描述, 功能
IA186EM/IA188EM
8/16-Bit Microcontrollers
Data Sheet
www.DataSheet4U.com
Copyright ! 2004







IA188EM pdf, 数据表
IA186EM/IA188EM
8/16-BIT Microcontrollers
Register Name
Peripheral Control Block Registers
PCB Relocation Register
Reset Configuration Register
Processor Release Level Register
Power-Save Control Register
Offset
FEh
F6h
F4h
F0h
Enable RCU Register
Clock Prescaler Register
Memory Partition Register
DMA Registers
DMA1 Control Register
DMA1 Transfer Count Register
DMA1 Destination Address High Register
DMA1 Destination Address Low Register
DMA1 Source Address High Register
DMA1 Source Address Low Register
DMA0 Control Register
DMA0 Transfer Count Register
DMA0 Destination Address High Register
DMA0 Destination Address Low Register
DMA0 Source Address High Register
DMA0 Source Address Low Register
Chip-Select Registers
pcs_n and mcs_n Auxiliary Register
Mid-Range Memory Chip-Select Register
Peripheral Chip-Select Register
Low-Memory Chip-Select Register
Upper-Memory Chip-Select Register
Asynchronous Serial Port Register
Serial Port Baud Rate Divisor Register
Serial Port Receive Register
Serial Port Transmit Register
Serial Port Status Register
Serial Port Control Register
PIO Registers
PIO Data 1 Register
PIO Direction 1 Register
PIO Mode 1 Register
PIO Data 0 Register
PIO Direction 0 Register
PIO Mode 0 Register
E4h
E2h
E0h
DAh
D8h
D6h
D4h
D2h
D0h
CAh
C8h
C6h
C4h
C2h
C0h
A8h
A6h
A4h
A2h
A0h
88h
86h
84h
82h
80h
7Ah
78h
76h
74h
72h
70h
Table 1. Map of Peripheral Control Registers
Data Sheet
As of Production Version -03
Register Name
Timer Registers
Timer 2 Mode & Control Register
Timer 2 Max Count Compare A Register
Timer 2 Count Register
Timer 1 Mode & Control Register
Timer 1 Max Count Compare B Register
Timer 1 Max Count Compare A Register
Timer 1 Count Register
Timer 0 Mode & Control Register
Timer 0 Max Count Compare B Register
Timer 0 Max Count Compare A Register
Timer 0 Count Register
Interrupt Registers
Serial Port 0 Interrupt Control Register
Watchdog Timer Control Register
INT4 Interrupt Control Register
INT3 Interrupt Control Register
INT2 Interrupt Control Register
INT1 Interrupt Control Register
INT0 Interrupt Control Register
DMA1 Interrupt Control Register
DMA0 Interrupt Control Register
Timer Interrupt Control Register
Interrupt Status Register
Interrupt Request Register
In-Service Register
Priority Mask Register
Interrupt Mask Register
Poll Status Register
Poll Register
End-of-Interrupt (EOI) Register
Interrupt Vector Register
Synchronous Serial Port Register
Synchronous Serial Receive Register
Synchronous Serial Transmit 0 Register
Synchronous Serial Transmit 1 Register
Synchronous Serial Enable Register
Synchronous Serial Status Register
Offset
66h
62h
60h
5Eh
5Ch
5Ah
58h
56h
54h
52h
50h
44h
42h
40h
3Eh
3Ch
3Ah
38h
36h
34h
32h
30h
2Eh
2Ch
2Ah
28h
26h
24h
22h
20h
18h
16h
14h
12h
10h
3737 Princeton NE, Ste 130 • Albuquerque, NM 87107 • Tel 505.883.5263 • Fax 505.883.5477 • www.Innovasic.com







IA188EM equivalent, schematic
IA186EM/IA188EM
8/16-BIT Microcontrollers
Data Sheet
As of Production Version -03
DSA [15:0] (bits 15-0) – DMA Source Address Low bits are placed onto a15-a0 during the read phase
of a DMA transfer.
MPCS (0a8h) - MCS and PCS Auxiliary Register.
This register controls more than one type of chip select, making it different from the other chip select
control registers. The MPCS register contains information for the following, mcs3_n - mcs0_n as well as
pcs6_n - pcs5_n and pcs3_n - pcs0_n.
The MPCS register also contains a bit that configures the pcs6_n - pcs5_n pins as either chip selects or as
alternate sources for the A2 and A1 address bits. Either address bits a1 & a2 or pcs6_n - pcs5_n are
selected to the exclusion of the other. When programmed for address bits, these outputs can be used to
provide latched address bits for a2 & a1
pcs6_n - pcs5_n are high and not active on processor reset. An access to the MPCS register causes the
pins to activate, when the pcs6_n - pcs5_n are configured as address pins. The pcs6_n - pcs5_n pins do
not require corresponding access to the PACS register to be activated.
The value of the MPCS register is undefined at reset.
15 14
13 12 11 10 9 8 7 6 5 4 3 2 1 0
1
M6-M0
EX MS 1 1 1 R2 R1-R0
Reserved (bit 15) – Set to 1.
M [6:0] (bits14-8) MCS_n Block Size – These seven bits determine the total block size for the
MCS3_n - MCS0_n chip selects. The total block size is divided equally among the four chip selects.
The following table shows the relationship between M [6:0] and the size of the memory block.
Total Block
Size
8K
16K
32K
64K
128K
256K
512K
Individual
Select Size
2K
4K
8K
16K
32K
64K
128K
M6 – M0
0000001b
0000010b
0000100b
0001000b
0010000b
0100000b
1000000b
EX (bit7) Pin Selector – This bit determines whether the pcs6_n - pcs5_n pins are configured as chip
selects or as alternate outputs for a2 & a1. When this bit is set to 1, pcs6_n - pcs5_n are configured
as peripheral chip select pins, whereas when set to 0, pcs6_n - pcs5_n become address bit a1 and
address bit a2 respectively.
3737 Princeton NE, Ste 130 • Albuquerque, NM 87107 • Tel 505.883.5263 • Fax 505.883.5477 • www.Innovasic.com










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