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PDF ( 数据手册 , 数据表 ) MX23C1024

零件编号 MX23C1024
描述 1M-BIT [64K x 16] CMOS MASK ROM
制造商 Macronix International
LOGO Macronix International LOGO 


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MX23C1024 数据手册, 描述, 功能
INDEX
FEATURES
• 64K x 16 organization (JEDEC pin out)
• Single +5V power supply
• Fast access time: 120/150/200ns
• Totally static operation
• Completely TTL compatible
MX23C1024
1M-BIT [64K x 16] CMOS MASK ROM
• Operating current: 60mA
• Standby current: 100uA
• Package
- 40 pin DIP (600 mil)
- 44 pin PLCC
GENERAL DESCRIPTION
The MX23C1024 is a 5V only, 1M-bit, Read Only
Memory. It is organized as 64Kx16 bit. MX23C1024
has a static standby mode, and has an access time of
120/150/200ns. It is designed to be compatible with all
microprocessors and similar applications in which high
performance, large bit storage and simple interfacing
are important design considerations.
MX23C1024 offers automatic power-down, with power-
down controlled by the chip enable (CE) input. When
CE is not selected, the device automatically powers
down and remains in a low-power standby mode as long
as CE stays in the unselected mode.
The OE input as well as CE input may be programmed
active Low.
PIN CONFIGURATION
www.DataSheet4U.com
40 PDIP
NC
CE
Q15
Q14
Q13
Q12
Q11
Q10
Q9
Q8
VSS
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
44 PLCC
40 VCC
39 NC
38 NC
37 A15
36 A14
35 A13
34 A12
33 A11
32 A10
31 A9
30 VSS
29 A8
28 A7
27 A6
26 A5
25 A4
24 A3
23 A2
22 A1
21 A0
Q12
Q11
Q10
Q9
Q8
VSS
NC
Q7
Q6
Q5
Q4
6
7
12
17
18
1 44
MX23C1024
23
40
39 A13
A12
A11
A10
A9
34 VSS
NC
A8
A7
A6
29 A5
28
BLOCK DIAGRAM
CE CONTROL
OE LOGIC
OUTPUT
BUFFERS
A0~A15
ADDRESS
INPUTS
VCC
VSS
.
.
.
.
.
.
.
.
Y-DECODER
X-DECODER
.
.
.
.
.
.
.
.
Y-DECODER
1M BIT
ROM ARRAY
Q0~Q15
PIN DESCRIPTION
Symbol
A0~A15
Q0~Q15
CE
OE
VCC
VSS
Pin Function
Address Input
Data Output
Chip Enable Input
Output Enable Input
Power Supply Pin (+5V)
Ground Pin
P/N:PM0189
REV. 1.3, JAN. 29, 1999
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