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PDF ( 数据手册 , 数据表 ) MC33596

零件编号 MC33596
描述 PLL Tuned UHF Receiver
制造商 Motorola Semiconductors
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MC33596 数据手册, 描述, 功能
Freescale Semiconductor
Data Sheet
MC33596
Rev. 3, 06/2007
MC33596
PLL Tuned UHF Receiver for Data Transfer Applications
1 Overview
The MC33596 is a highly integrated receiver
designed for low-voltage applications. It includes a
programmable PLL for multi-channel applications,
an RSSI circuit, a strobe oscillator that periodically
wakes up the receiver while a data manager checks
the content of incoming messages. A configuration
www.DataSheet4U.com
switching feature allows automatic changing of the
configuration between two programmable settings
without the need of an MCU.
LQFP32
2 Features
General:
• 304 MHz, 315 MHz, 426 MHz, 434 MHz,
868 MHz, and 915 MHz ISM bands
• Choice of temperature ranges:
— –40°C to +85°C
— –20°C to +85°C
• OOK and FSK reception
• 20 kbps maximum data rate using
Manchester coding
• 2.1 V to 3.6 V or 5 V supply voltage
• Programmable via SPI
• 6 kHz PLL frequency step
RSSIOUT
VCC2RF
RFIN
GNDLNA
VCC2VCO
GND
NC
GND
1
2
3
4
5
6
7
8
QFN32
24 SEB
23 SCLK
22 MOSI
21 MISO
20 CONFB
19 DATACLK
18 RSSIC
17 GNDDIG
© Freescale Semiconductor, Inc., 2006, 2007. All rights reserved.







MC33596 pdf, 数据表
Frequency Planning
It is also possible to define two different configurations for the receiver (frequency, data rate, data manager,
modulation, etc.) that are automatically loaded during wakeup or under MCU control.
If the PLL goes out of lock, received data are ignored.
9 Frequency Planning
9.1 Clock Generator
All clocks running in the circuit are derived from the reference frequency provided by the crystal oscillator
(frequency fref, period tref). The crystal frequency is chosen in relation to the band in which the MC33596
has to operate. Table 4 shows the value of the CF bits.
Table 4. Crystal Frequency and CF Values Versus Frequency Band
RF
Frequency
(MHz)
304
315
426
433.92
868.3
916.5
CF1
0
0
0
0
1
1
CF0
LOF1
LOF0
FREF (Crystal
Frequency)
(MHz)
FIF (IF
Frequency)
(MHz)
Dataclk Fdataclk Digclk
Divider (kHz) Divider
Fdigclk
(kHz)
Tdigclk
(µs)
0 0 0 16.96745
0 1 0 17.58140
1 0 1 23.74913
1 0 1 24.19066
1 0 1 24.16139
1 1 1 25.50261
1.414
1.465
1.484
1.512
1.510
1.594
60 282.791 30 565.582 1.77
60 293.023 30 586.047 1.71
80 296.864 40 593.728 1.68
80 302.383 40 604.767 1.65
80 302.017 40 604.035 1.66
80 318.783 40 637.565 1.57
9.2 Intermediate Frequency
The IF filter is controlled by the crystal oscillator to guarantee the frequency over temperature and voltage
range. The IF filter center frequency, FIF, can be computed using the crystal frequency fref and the value
of the CF bits:
• If CF[0] = 0 : FIF = fref/9*1.5/2
• If CF[0] = 1 : FIF = fref/12*1.5/2
The cut-off frequency given in the parametric section can be computed by scaling to the FIF.
Example 1. Cut-off Frequency Computation
Compute the low cut-off frequency of the IF filter for a 16.9683 MHz crystal oscillator. For this
reference frequency, FIF = 1.414 MHz.
So, the 1.3751 MHz low cut-off frequency specified for a 1.5 MHz IF frequency becomes
1.3751*1.414/1.5 = 1.296 MHz
1. Refer to parameter 3.3 found in Section 18.1, “General Parameters.”
MC33596 Data Sheet, Rev. 3
8
Freescale Semiconductor







MC33596 equivalent, schematic
Register Access through SPI
10.3.4.2 BANKA = 0, BANKB = 1
State B
OFF
State B
OFF
Strobe Pin
If strobe pin is 1, configuration is defined by Bank B, BANKS = 0.
If strobe pin is 0, MC33596 configuration is OFF.
If a message is received during State B, current state remains State B up to end of message.
10.3.4.3 BANKA = 1, BANK B = 1
State A
OFF
State B
OFF
State A
Strobe Pin
Banks Bit
If strobe pin is 1, configuration is defined by BANKS. BANKS is toggled at each falling edge of the strobe
pin.
If strobe pin is 0, MC33596 configuration is OFF.
If a message is received during state A or state B, current state remains the same up to end of message.
If a read or write access is done using SPI, the next sequence will begin with state A whatever was the
active state before SPI access by MCU.
10.3.5 Strobe Oscillator Switch Control
The conditions to enter strobe oscillator switch control are:
• Strobe pin connected to an external capacitor to define timing (see Section 13, “Receiver On/Off
Control”)
• Strobe pin can also be connected to the MCU I/O port
• SOE bit = 1
By simply writing BANKA and BANKB, the active banks will be defined.
BANKA
X
0
1
BANKB
0 Bank A is active
1 Bank B is active
1 Bank A and Bank B are both active, configuration will toggle at each wakeup
MCU can override strobe oscillator control by controlling strobe pin level. If MCU I/O port is in high
impedance, strobe oscillator will control the OFF/ON state of the MC33596. The various available
sequences are described in the following subsections.
MC33596 Data Sheet, Rev. 3
16 Freescale Semiconductor










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