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PDF ( 数据手册 , 数据表 ) X9401

零件编号 X9401
描述 Digitally Controlled Potentiometer
制造商 Intersil Corporation
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X9401 数据手册, 描述, 功能
®
Data Sheet
X9401
Low Noise/Low Power/SPI Bus
October 12, 2006
FN8190.3
Quad, 64 Tap, Digitally Controlled
Potentiometer (XDCP™)
FEATURES
• Quad–4 separate pots, 64 taps/pot
• Nonvolatile storage of wiper position
• Four Nonvolatile Data Registers for Each Pot
• 16-bytes of EEPROM memory
• SPI serial interface
• RTotal = 10kΩ
• Wiper resistance = 150Ω typical
• Standby current < 1µA (total package)
• Operating current < 400µA max.
• VCC = 2.7V to 5V
• Package–24 Ld SOIC
• 100 year data retention
• Pb-free plus anneal available (RoHS compliant)
DESCRIPTION
The X9401 integrates 4 digitally controlled potentiome-
ters (XDCP) on a monolithic CMOS integrated
microcircuit.
The digitally controlled potentiometer is implemented
using 64 resistive elements in a series array. Between
each element are tap points connected to the wiper
terminal through switches. The position of the wiper on
the array is controlled by the user through the SPI bus
interface. Each potentiometer has associated with it a
volatile Wiper Counter Register (WCR) and 4 nonvola-
tile Data Registers (DR0:DR3) that can be directly writ-
ten to and read by the user. The contents of the WCR
controls the position of the wiper on the resistor array
through the switches. Power-up recalls the contents of
DR0 to the WCR.
The XDCP can be used as a three-terminal potentiom-
eter or as a two-terminal variable resistor in a wide
variety of applications including control, parameter
adjustments, and signal processing.
BLOCK DIAGRAM
www.DataSheet4U.com
VCC
VSS
HOLD
CS
SCK
SO
SI
A0
A1
WP
Interface
and
Control
Circuitry
8
Data
R0 R1
R2 R3
Pot 0
Wiper
Counter
Register
(WCR)
VH0/RH0
VL0/RL0
VW0/RW0
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Resistor
Array
Pot 2
VH2/RH2
VL2/RL2
VW2/RW2
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
VW1/RW1
Resistor
Array
Pot 1
VH1/RH1
VL1/RL1
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
VW3/RW3
Resistor
Array
Pot 3
VH3/RH3
VL3/RL3
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.







X9401 pdf, 数据表
X9401
Instruction Format
Notes: (1) “A1 ~ A0”: stands for the device addresses sent by the master.
(2) WPx refers to wiper position data in the Counter Register
(3) “I”: stands for the increment operation, SI held HIGH during active SCK phase (high).
(4) “D”: stands for the decrement operation, SI held LOW during active SCK phase (high).
Read Wiper Counter Register (WCR)
CS
Falling
Edge
device type
identifier
0101
device
addresses
0
0
A
1
A
0
instruction
opcode
1001
WCR
addresses
0
0
P
1
P
0
wiper position
(sent by X9401 on SO) CS
0
0
W
P
W
P
W
P
W
P
W
P
W
P
Rising
Edge
543210
Write Wiper Counter Register (WCR)
CS
Falling
Edge
device type
identifier
0101
device
addresses
0
0
A
1
A
0
instruction
opcode
1010
WCR
addresses
0
0
P
1
P
0
Data Byte
(sent by Host on SI)
CS
0
0
W
P
W
P
W
P
W
P
W
P
W
P
Rising
Edge
543210
Read Data Register (DR)
CS
Falling
Edge
device type
identifier
0101
device
addresses
0
0
A
1
A
0
instruction
opcode
1011
DR and WCR
addresses
RRPP
1010
Data Byte
(sent by X9401 on SO) CS
0
0
W
P
W
P
W
P
W
P
W
P
W
P
Rising
Edge
543210
Write Data Register (DR)
device type
CS identifier
Falling
Edge 0 1 0 1
device instruction
addresses opcode
0
0
A
1
A
0
1
1
0
0
DR and WCR
addresses
RRPP
1010
Data Byte
(sent by host on SI)
CS
0
0
W
P
W
P
W
P
W
P
W
P
W
P
Rising
Edge
543210
HIGH-VOLTAGE
WRITE CYCLE
Transfer Data Register (DR) to Wiper Counter Register (WCR)
CS
Falling
Edge
device type
identifier
0101
device
addresses
0
0
A
1
A
0
instruction
opcode
1101
DR and WCR
addresses
RRPP
1010
CS
Rising
Edge
8 FN8190.3
October 12, 2006







X9401 equivalent, schematic
Application Circuits
NONINVERTING AMPLIFIER
VS +
VO
R2
R1
VO = (1+R2/R1)VS
X9401
VOLTAGE REGULATOR
VIN 317
VO (REG)
R1
Iadj
R2
VO (REG) = 1.25V (1+R2/R1)+Iadj R2
OFFSET VOLTAGE ADJUSTMENT
R1
VS
R2
100kΩ
+
TL072
10kΩ
10kΩ
10kΩ
+5V
VO
COMPARATOR WITH HYSTERESIS
VS
+
VO
R1 R2
VUL = {R1/(R1+R2)} VO(max)
VLL = {R1/(R1+R2)} VO(min)
ATTENUATOR
R1 R2
VS + VO
R3
R4 All RS = 10kΩ
VO = G VS
-1/2 G +1/2
FILTER
C
VS
R
+
VO
R2
R1
GO = 1 + R2/R1
fc = 1/(2πRC)
16 FN8190.3
October 12, 2006










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