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PDF ( 数据手册 , 数据表 ) ISL22316

零件编号 ISL22316
描述 Single Digitally Controlled Potentiometer
制造商 Intersil Corporation
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ISL22316 数据手册, 描述, 功能
Data Sheet
ISL22316
Single Digitally Controlled Potentiometer (XDCP™)
August 14, 2015
FN6186.3
Low Noise, Low Power I2CBus,
128 Taps
The ISL22316 integrates a single digitally controlled
potentiometer (DCP) and non-volatile memory on a
monolithic CMOS integrated circuit.
The digitally controlled potentiometer is implemented with a
combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
I2C bus interface. The potentiometer has an associated
volatile Wiper Register (WR) and a non-volatile Initial Value
Register (IVR) that can be directly written to and read by the
user. The contents of the WR controls the position of the
wiper. At power-up, the device recalls the contents of the
DCP’s IVR to the WR.
The DCP can be used as a three-terminal potentiometer or
as a two-terminal variable resistor in a wide variety of
applications including control, parameter adjustments, and
signal processing.
Pinouts
SCL
SDA
A1
A0
SHDN
ISL22316
(10 LD MSOP)
TOP VIEW
1 10
29
38
47
56
VCC
RH
RW
RL
GND
Features
• 128 resistor taps
• I2C serial interface
- Two address pins, up to four devices/bus
• Non-volatile storage of wiper position
• Wiper resistance: 70typical @ VCC = 3.3V
• Shutdown mode
• Shutdown current 5µA max
• Power supply: 2.7V to 5.5V
• 50kor 10ktotal resistance
• High reliability
- Endurance: 1,000,000 data changes per bit per register
- Register data retention: 50 years @ T +55°C
• 10 Ld MSOP or 10 Ld TDFN package
• Pb-free (RoHS compliant)
ISL22316
(10 LD TDFN)
TOP VIEW
SCL 1 O
SDA 2
A1 3
A0 4
SHDN 5
10 VCC
9 RH
8 RW
7 RL
6 GND
Ordering Information
PART NUMBER
(Note)
PART
MARKING
RESISTANCE OPTION
(k)
TEMP. RANGE
(°C)
PACKAGE
(Pb-free)
PKG. DWG. #
ISL22316UFU10Z*
(No longer available,
recommended
replacement:
(ISL22316WFRT10Z-TK)
316UZ
50
-40 to +125
10 Ld MSOP
M10.118
ISL22316WFU10Z*
316WZ
10
-40 to +125
10 Ld MSOP
M10.118
ISL22316UFRT10Z*
(No longer available,
recommended
replacement:
(ISL22316WFRT10Z-TK)
316U
50
-40 to +125
10 Ld 3x3 TDFN
L10.3x3B
ISL22316WFRT10Z*
316W
10
-40 to +125
10 Ld 3x3 TDFN
L10.3x3B
*Add “-TK” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2006, 2008, 2009, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.







ISL22316 pdf, 数据表
ISL22316
Typical Performance Curves (Continued)
0.2
T = +25°C
VCC = 2.7V
0.1
0.2
0.1
00
VCC = 2.7V
T = +25°C
-0.1
-0.2
0
VCC = 5.5V
20 40 60 80 100
TAP POSITION (DECIMAL)
120
FIGURE 3. DNL vs TAP POSITION IN VOLTAGE DIVIDER
MODE FOR 10k(W)
-0.1
-0.2
0
VCC = 5.5V
20 40 60 80 100
TAP POSITION (DECIMAL)
120
FIGURE 4. INL vs TAP POSITION IN VOLTAGE DIVIDER
MODE FOR 10k(W)
1.3
10k
1.1
0.9
0.7
0.5 VCC = 5.5V
0.3
VCC = 2.7V
0.1
-0.1 50k
-0.3
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
FIGURE 5. ZSERROR vs TEMPERATURE
120
0.0
-0.3 VCC = 2.7V
-0.6
50k VCC = 5.5V
-0.9
10k
-1.2
-1.5
-40 -20 0 20 40 60 80 100
TEMPERATURE (ºC)
FIGURE 6. FSERROR vs TEMPERATURE
120
0.4
T = +25°C
0.2 VCC = 5.5V
0
-0.2
-0.4
-0.6
16
VCC = 2.7V
36 56 76 96
TAP POSITION (DECIMAL)
116
FIGURE 7. DNL vs TAP POSITION IN RHEOSTAT MODE FOR
10k(W)
8
0.4
T = +25°C
0.2 VCC = 5.5V
0
-0.2
-0.4
-0.6
16
VCC = 2.7V
36 56 76 96
TAP POSITION (DECIMAL)
116
FIGURE 8. INL vs TAP POSITION IN RHEOSTAT MODE FOR
10k(W)
FN6186.3
August 14, 2015







ISL22316 equivalent, schematic
ISL22316
Package Outline Drawing
M10.118
10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 1, 4/12
3.0±0.05
5
A
10
D
1.10 MAX
PIN# 1 ID
12
3.0±0.05 4.9±0.15
5
0.50 BSC
B
TOP VIEW
H
0.18 - 0.27
0.08 M C A-B D
SIDE VIEW 1
0.85±010
C
SEATING PLANE
0.10 ± 0.05
0.10 C
DETAIL "X"
SIDE VIEW 2
0.09 - 0.20
0.95 REF
GAUGE
PLANE
0.25
0.55 ± 0.15
DETAIL "X"
3°±3°
(5.80)
(4.40)
(3.00)
(0.50)
(1.40)
TYPICAL RECOMMENDED LAND PATTERN
(0.29)
NOTES:
1. Dimensions are in millimeters.
2. Dimensioning and tolerancing conform to JEDEC MO-187-BA
and AMSEY14.5m-1994.
3. Plastic or metal protrusions of 0.15mm max per side are not
included.
4. Plastic interlead protrusions of 0.15mm max per side are not
included.
5. Dimensions are measured at Datum Plane "H".
6. Dimensions in ( ) are for reference only.
16 FN6186.3
August 14, 2015










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