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PDF ( 数据手册 , 数据表 ) SY100EL16VO

零件编号 SY100EL16VO
描述 DUAL SUPPLY OCTAL ECL-TO-TTL
制造商 Micrel Semiconductor
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SY100EL16VO 数据手册, 描述, 功能
3.3V/5V 800MHz
PRECISION PECL AMPLIFIER
WITH LOW GAIN FEEDBACK
SY100EL16VO
FINAL
FEATURES
s 3.3V and 5V ±10% power supply options
s Guaranteed AC parameters over temperature:
• fMAX = 800MHz
• < 200ps differential propagation delay (D to QFB)
• < 730ps differential propagation delay (D to QHG)
• < 250ps tr / tf
s Low gain feedback path QFB = +10V/V
s Output enable
s VBB reference output voltage
s Wide temperature range: –40°C to +85°C
s Available in 10-pin (3×3mm) MSOP
DESCRIPTION
The SY100EL16VO is a differential receiver amplifier
optimized for crystal oscillator applications. The device includes
an additional low gain (+10V/V) output stage (QFB) ideal for
feedback applications common in crystal oscillator gain blocks.
The SY100EL16VO is fully differential, with a bandwidth
> 800MHz over temperature and voltage. For applications that
require output disable control, an Enable pin (/EN) will force
the differential output into a fixed logic state. The
SY100EL16VO also includes a VBB reference voltage for
single-ended or AC-coupled applications.
The SY100EL16VO PECL logic is 100k ECL compatible.
Operation is guaranteed over the –40°C to +85°C temperature
range and 3.3V to 5V nominal supply voltage range.
PIN CONFIGURATION
TRUTH TABLE
QFB 1
/QFB 2
D3
/D 4
VBB 5
10 VCC
9 QHG
8 /QHG
7 VEE
6 /EN
/EN
0
1
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PIN NAMES
QHG Out
Data
Logic Low
/QHG Out
/Data
Logic High
BLOCK DIAGRAM
QFB
/QFB
D
/D
VBB
/EN
LEN Q
LATCH
D
VCC
QHG
/QHG
VEE
Pin Function
QFB, /QFB Differential clock outputs for feedback path:
Nominal DC gain +10.
D, /D
PECL, LVPECL, ECL, LVECL differential inputs:
Internal 75kpull-down resistor.
VBB VCC –1.32V reference voltage for single-ended
inputs: It provides the switching reference for the
input differential amplifier. When unused, it can be
left open. For single-ended PECL applications
connect VBB to /D input, and bypass with a 0.01µF
capacitor to VCC.
/EN Enable: PECL compatible input control with internal
75kpull-down resistor. It controls the high-gain
output (QHG). When HIGH, QHG is low and /QHG is
high. /EN is synchronous so that the outputs will only
be enabled/disabled when they are in the LOW state.
VEE Negative power supply: For ECL/LVECL operation,
connect to negative supply. For PECL/ LVPECL
operation, connect to GND.
QHG, /QHG Differential high-gain outputs: Nominal DC gain is
greater than +200.
VCC Positive power supply: For ECL/LVECL operation,
connect to VCC = 0V. For PECL/ LVPECL operation,
connect to either 3.3V or 5.0V. Bypass with 0.1µF//
0.01µF low ESR capacitors.
Rev.: C Amendment: /0
1 Issue Date: February 2003












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