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PDF ( 数据手册 , 数据表 ) K8D638UBM

零件编号 K8D638UBM
描述 (K8D6x16UxM) 64M Bit (8M x8/4M x16) Dual Bank NOR Flash Memory
制造商 Samsung semiconductor
LOGO Samsung semiconductor LOGO 


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K8D638UBM 数据手册, 描述, 功能
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K8D6x16UTM / K8D6x16UBM
FLASH MEMORY
Document Title
64M Bit (8M x8/4M x16) Dual Bank NOR Flash Memory
Revision History
Revision No. History
0.0 Initial Draft
1.0 Final Specification
1.1 Revised
- Release the stand-by current from typ. 5uA(max. 18uA) to typ.
10uA(max. 30uA).
1.2 Not support 48TSOP1 Package
Not support 16M/16M BANK partition
1.3 Support 48TSOP1 Package
1.4 Support 48TSOP1 Lead Free Package
1.5 Support 48FBGA Leaded/Lead Free Package
Draft Date
Remark
January 10, 2002 Preliminary
May 22, 2002
Final
June 18, 2003
November 18, 2003
July 22, 2004
September 16,
2004
March 16, 2005
1 Revision 1.5
March 2005







K8D638UBM pdf, 数据表
K8D6x16UTM / K8D6x16UBM
FLASH MEMORY
Table 3. Top Boot Block Address (Continued)
K8D6316UT
Bank2
Block
BA34
BA33
BA32
BA31
BA30
BA29
BA28
BA27
BA26
BA25
BA24
BA23
BA22
BA21
BA20
BA19
BA18
BA17
BA16
BA15
BA14
BA13
BA12
BA11
BA10
BA9
BA8
BA7
BA6
BA5
BA4
BA3
BA2
BA1
BA0
Block Address
Block Size
A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 (KB/KW)
Address Range
Byte Mode
Word Mode
0 1 0 0 0 1 0XXX
64/32 220000H-22FFFFH 110000H-117FFFH
0 1 0 0 0 0 1XXX
64/32 210000H-21FFFFH 108000H-10FFFFH
0 1 0 0 0 0 0XXX
64/32 200000H-20FFFFH 100000H-107FFFH
0 0 1 1 1 1 1XXX
64/32 1F0000H-1FFFFFH 0F8000H-0FFFFFH
0 0 1 1 1 1 0XXX
64/32 1E0000H-1EFFFFH 0F0000H-0F7FFFH
0 0 1 1 1 0 1XXX
64/32 1D0000H-1DFFFFH 0E8000H-0EFFFFH
0 0 1 1 1 0 0XXX
64/32 1C0000H-1CFFFFH 0E0000H-0E7FFFH
0 0 1 1 0 1 1XXX
64/32 1B0000H-1BFFFFH 0D8000H-0DFFFFH
0 0 1 1 0 1 0XXX
64/32 1A0000H-1AFFFFH 0D0000H-0D7FFFH
0 0 1 1 0 0 1XXX
64/32 190000H-19FFFFH 0C8000H-0CFFFFH
0 0 1 1 0 0 0XXX
64/32 180000H-18FFFFH 0C0000H-0C7FFFH
0 0 1 0 1 1 1XXX
64/32 170000H-17FFFFH 0B8000H-0BFFFFH
0 0 1 0 1 1 0XXX
64/32 160000H-16FFFFH 0B0000H-0B7FFFH
0 0 1 0 1 0 1XXX
64/32 150000H-15FFFFH 0A8000H-0AFFFFH
0 0 1 0 1 0 0XXX
64/32 140000H-14FFFFH 0A0000H-0A7FFFH
0 0 1 0 0 1 1XXX
64/32 130000H-13FFFFH 098000H-09FFFFH
0 0 1 0 0 1 0XXX
64/32 120000H-12FFFFH 090000H-097FFFH
0 0 1 0 0 0 1XXX
64/32
110000H-11FFFFH 088000H-08FFFFH
0 0 1 0 0 0 0XXX
64/32 100000H-10FFFFH 080000H-087FFFH
0 0 0 1 1 1 1XXX
64/32 0F0000H-0FFFFFH 078000H-07FFFFH
0 0 0 1 1 1 0XXX
64/32 0E0000H-0EFFFFH 070000H-077FFFH
0 0 0 1 1 0 1XXX
64/32 0D0000H-0DFFFFH 068000H-06FFFFH
0 0 0 1 1 0 0XXX
64/32 0C0000H-0CFFFFH 060000H-067FFFH
0 0 0 1 0 1 1XXX
64/32 0B0000H-0BFFFFH 058000H-05FFFFH
0 0 0 1 0 1 0XXX
64/32 0A0000H-0AFFFFH 050000H-057FFFH
0 0 0 1 0 0 1XXX
64/32 090000H-09FFFFH 048000H-04FFFFH
0 0 0 1 0 0 0XXX
64/32 080000H-08FFFFH 040000H-047FFFH
0 0 0 0 1 1 1XXX
64/32 070000H-07FFFFH 038000H-03FFFFH
0 0 0 0 1 1 0XXX
64/32 060000H-06FFFFH 030000H-037FFFH
0 0 0 0 1 0 1XXX
64/32 050000H-05FFFFH 028000H-02FFFFH
0 0 0 0 1 0 0XXX
64/32 040000H-04FFFFH 020000H-027FFFH
0 0 0 0 0 1 1XXX
64/32 030000H-03FFFFH 018000H-01FFFFH
0 0 0 0 0 1 0XXX
64/32 020000H-02FFFFH 010000H-017FFFH
0 0 0 0 0 0 1XXX
64/32 010000H-01FFFFH 008000H-00FFFFH
0 0 0 0 0 0 0XXX
64/32 000000H-00FFFFH 000000H-007FFFH
Note : The bank address bits are A21 A20 for K8D6316UT.
Table 4. Secode Block Addresses for Top Boot Devices
Device
K8D6316UT
Block Address
A21-A12
1111111xxx
Block Size
(KB/KW)
64/32
(X8)
Address Range
7F0000H-7FFFFFH
(X16)
Address Range
3F8000H-3FFFFFH
8 Revision 1.5
March 2005







K8D638UBM equivalent, schematic
K8D6x16UTM / K8D6x16UBM
FLASH MEMORY
DEVICE OPERATION
Byte/Word Mode
If the BYTE pin is set at logical "1" , the device is in word mode, DQ0-DQ15 are active. Otherwise the BYTE pin is set at logical "0" ,
the device is in byte mode, DQ0-DQ7 are active. DQ8-DQ14 are in the High-Z state and DQ15 pin is used as an input for the LSB
(A-1) address pin.
Read Mode
The K8D6316U is controlled by Chip Enable (CE), Output Enable (OE) and Write Enable (WE). When CE and OE are low and WE
is high, the data stored at the specified address location,will be the output of the device. The outputs are in high impedance state
whenever CE or OE is high.
Standby Mode
The K8D6316U features Stand-by Mode to reduce power consumption. This mode puts the device on hold when the device is dese-
lected by making CE high (CE = VIH). Refer to the DC characteristics for more details on stand-by modes.
Output Disable
The device outputs are disabled when OE is High (OE = VIH). The output pins are in high impedance state.
Automatic Sleep Mode
K8D6316U features Automatic Sleep Mode to minimize the device power consumption. Since the device typically draws 10µA of
the current in Automatic Sleep Mode, this feature plays an extremely important role in battery-powered applications. When
addresses remain steady for tAA+50ns, the device automatically activates the Automatic Sleep Mode. In the sleep mode, output data
is latched and always available to the system. When addresses are changed, the device provides new data without wait time.
Address
Outputs
Data
Data
Data
tAA + 50ns
Data
Auto Sleep Mode
Data
Data
Figure 1. Auto Sleep Mode Operation
Autoselect Mode
The K8D6316U offers the Autoselect Mode to identify manufacturer and device type by reading a binary code. The Autoselect Mode
allows programming equipment to automatically match the device to be programmed with its corresponding programming algorithm.
In addition, this mode allows the verification of the status of write protected blocks. This mode is used by two method. The one is high
voltage method to be required VID (8.5V~12.5V) on address pin A9. When A9 is held at VID and the bank address or block address is
asserted, the device outputs the valid data via DQ pins(see Table 9 and Figure 2). The rest of addresses except A0, A1 and A6 are
Dont Care. The other is autoselect command method that the autoselect code is accessible by the commamd sequence without VID.
The manufacturer and device code may also be read via the command register. The Command Sequence is shown in Table 8 and
Figure 3. The autoselect operation of block protect verification is initiated by first writing two unlock cycle. The third cycle must con-
tain the bank address and autoselect command (90H). If Block address while (A6, A1, A0) = (0,1,0) is finally asserted on the address
pin, it will produce a logical "1" at the device output DQ0 to indicate a write protected block or a logical "0" at the device output DQ0
to indicate a write unprotected block. To terminate the autoselect operation, write Reset command (F0H) into the command register.
16 Revision 1.5
March 2005










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Samsung semiconductor

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