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PDF ( 数据手册 , 数据表 ) C8051F342

零件编号 C8051F342
描述 Full Speed USB Flash MCU
制造商 Silicon Laboratories
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C8051F342 数据手册, 描述, 功能
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
Full Speed USB Flash MCU Family
Analog Peripherals
- 10-Bit ADC (C8051F340/1/2/3/4/5/6/7/A/B only)
Up to 200 ksps
Built-in analog multiplexer with single-ended and
differential mode
VREF from external pin, internal reference, or VDD
Built-in temperature sensor
External conversion start input option
- Two comparators
- Internal voltage reference
(C8051F340/1/2/3/4/5/6/7/A/B only)
- Brown-out detector and POR Circuitry
USB Function Controller
- USB specification 2.0 compliant
- Full speed (12 Mbps) or low speed (1.5 Mbps) operation
- Integrated clock recovery; no external crystal required for
full speed or low speed
- Supports eight flexible endpoints
- 1 kB USB buffer memory
- Integrated transceiver; no external resistors required
On-Chip Debug
- On-chip debug circuitry facilitates full speed, non-intru-
sive in-system debug (No emulator required)
- Provides breakpoints, single stepping,
inspect/modify memory and registers
- Superior performance to emulation systems using
ICE-chips, target pods, and sockets
Voltage Supply Input: 2.7 to 5.25 V
- Voltages from 3.6 to 5.25 V supported using On-Chip
Voltage Regulator
HIgh Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of
Instructions in 1 or 2 system clocks
- 48 MIPS and 25 MIPS versions available.
- Expanded interrupt handler
Memory
- 4352 or 2304 Bytes RAM
- 64 or 32 kB Flash; In-system programmable in 512-byte
sectors
Digital Peripherals
- 40/25 Port I/O; All 5 V tolerant with high sink current
- Hardware enhanced SPI™, SMBus™, and one or two
enhanced UART serial ports
- Four general purpose 16-bit counter/timers
- 16-bit programmable counter array (PCA) with five cap-
ture/compare modules
- External Memory Interface (EMIF)
Clock Sources
- Internal Oscillator: ±0.25% accuracy with clock recovery
enabled. Supports all USB and UART modes
- External Oscillator: Crystal, RC, C, or clock (1 or 2 Pin
modes)
- Low Frequency (80 kHz) Internal Oscillator
- Can switch between clock sources on-the-fly
Packages
- 48-pin TQFP (C8051F340/1/4/5/8/C)
- 32-pin LQFP (C8051F342/3/6/7/9/A/B/D)
- 5x5 mm 32-pin QFN (C8051F342/3/6/7/9/A/B)
Temperature Range: –40 to +85 °C
ANALOG
PERIPHERALS
A 10-bit +
M
U
200 ksps
+
-
X ADC -
TEMP
SENSOR
VREF
VREG
C8051F340/1/2/34/5/6/7/A/B Only
PRECISION INTERNAL
OSCILLATORS
DIGITAL I/O
UART0
UART1*
SPI
SMBus
PCA
Port 0
Port 1
Port 2
4 Timers
Port 3
48 Pin Only
Port 4
* C8051F340/1/4/5/8/A/B/C Only
USB Controller /
Transceiver
HIGH-SPEED CONTROLLER CORE
64/32 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(48/25 MIPS)
DEBUG
CIRCUITRY
4/2 kB RAM
POR WDT
Rev. 1.4 9/09
Copyright © 2009 by Silicon Laboratories
C8051F34x







C8051F342 pdf, 数据表
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
8 Rev. 1.3







C8051F342 equivalent, schematic
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
SFR Definition 14.3. OSCLCN: Internal L-F Oscillator Control . . . . . . . . . . . . . . . . . . 134
SFR Definition 14.4. OSCXCN: External Oscillator Control . . . . . . . . . . . . . . . . . . . . 137
SFR Definition 14.5. CLKMUL: Clock Multiplier Control . . . . . . . . . . . . . . . . . . . . . . . 138
SFR Definition 14.6. CLKSEL: Clock Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
SFR Definition 15.1. XBR0: Port I/O Crossbar Register 0 . . . . . . . . . . . . . . . . . . . . . 148
SFR Definition 15.2. XBR1: Port I/O Crossbar Register 1 . . . . . . . . . . . . . . . . . . . . . 149
SFR Definition 15.3. XBR2: Port I/O Crossbar Register 2 . . . . . . . . . . . . . . . . . . . . . 149
SFR Definition 15.4. P0: Port0 Latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
SFR Definition 15.5. P0MDIN: Port0 Input Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
SFR Definition 15.6. P0MDOUT: Port0 Output Mode . . . . . . . . . . . . . . . . . . . . . . . . 151
SFR Definition 15.7. P0SKIP: Port0 Skip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
SFR Definition 15.8. P1: Port1 Latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
SFR Definition 15.9. P1MDIN: Port1 Input Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
SFR Definition 15.10. P1MDOUT: Port1 Output Mode . . . . . . . . . . . . . . . . . . . . . . . . 152
SFR Definition 15.11. P1SKIP: Port1 Skip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
SFR Definition 15.12. P2: Port2 Latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
SFR Definition 15.13. P2MDIN: Port2 Input Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
SFR Definition 15.14. P2MDOUT: Port2 Output Mode . . . . . . . . . . . . . . . . . . . . . . . . 154
SFR Definition 15.15. P2SKIP: Port2 Skip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
SFR Definition 15.16. P3: Port3 Latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
SFR Definition 15.17. P3MDIN: Port3 Input Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
SFR Definition 15.18. P3MDOUT: Port3 Output Mode . . . . . . . . . . . . . . . . . . . . . . . . 155
SFR Definition 15.19. P3SKIP: Port3 Skip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
SFR Definition 15.20. P4: Port4 Latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
SFR Definition 15.21. P4MDIN: Port4 Input Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
SFR Definition 15.22. P4MDOUT: Port4 Output Mode . . . . . . . . . . . . . . . . . . . . . . . . 157
SFR Definition 16.1. USB0XCN: USB0 Transceiver Control . . . . . . . . . . . . . . . . . . . 161
SFR Definition 16.2. USB0ADR: USB0 Indirect Address . . . . . . . . . . . . . . . . . . . . . . 163
SFR Definition 16.3. USB0DAT: USB0 Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
USB Register Definition 16.4. INDEX: USB0 Endpoint Index . . . . . . . . . . . . . . . . . . . 165
USB Register Definition 16.5. CLKREC: Clock Recovery Control . . . . . . . . . . . . . . . 166
USB Register Definition 16.6. FIFOn: USB0 Endpoint FIFO Access . . . . . . . . . . . . . 168
USB Register Definition 16.7. FADDR: USB0 Function Address . . . . . . . . . . . . . . . . 169
USB Register Definition 16.8. POWER: USB0 Power . . . . . . . . . . . . . . . . . . . . . . . . 171
USB Register Definition 16.9. FRAMEL: USB0 Frame Number Low . . . . . . . . . . . . . 172
USB Register Definition 16.10. FRAMEH: USB0 Frame Number High . . . . . . . . . . . 172
USB Register Definition 16.11. IN1INT: USB0 IN Endpoint Interrupt . . . . . . . . . . . . . 173
USB Register Definition 16.12. OUT1INT: USB0 Out Endpoint Interrupt . . . . . . . . . . 173
USB Register Definition 16.13. CMINT: USB0 Common Interrupt . . . . . . . . . . . . . . . 174
USB Register Definition 16.14. IN1IE: USB0 IN Endpoint Interrupt Enable . . . . . . . . 175
USB Register Definition 16.15. OUT1IE: USB0 Out Endpoint Interrupt Enable . . . . . 175
USB Register Definition 16.16. CMIE: USB0 Common Interrupt Enable . . . . . . . . . . 176
USB Register Definition 16.17. E0CSR: USB0 Endpoint0 Control . . . . . . . . . . . . . . . 179
USB Register Definition 16.18. E0CNT: USB0 Endpoint 0 Data Count . . . . . . . . . . . 180
14 Rev. 1.3










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