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PDF ( 数据手册 , 数据表 ) XA-G37

零件编号 XA-G37
描述 XA 16-bit microcontroller family
制造商 NXP Semiconductors
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XA-G37 数据手册, 描述, 功能
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XA-G37
XA 16-bit microcontroller family
32K OTP, 512 B RAM, watchdog, 2 UARTs
Product data
Replaces datasheet XA-G3 of 2001 Jun 25
2002 Mar 25
Philips
Semiconductors







XA-G37 pdf, 数据表
Philips Semiconductors
XA 16-bit microcontroller family
32K OTP, 512 B RAM, watchdog, 2 UARTs
Product data
XA-G37
NAME
DESCRIPTION
P3* Port 3
SFR
ADDRESS
433
MSB
39F
RD
BIT FUNCTIONS AND ADDRESSES
39E 39D 39C 39B 39A 399
WR T1
T0 INT1 INT0 TxD0
LSB
398
RxD0
RESET
VALUE
FF
P0CFGA Port 0 configuration A
P1CFGA Port 1 configuration A
P2CFGA Port 2 configuration A
P3CFGA Port 3 configuration A
P0CFGB Port 0 configuration B
P1CFGB Port 1 configuration B
P2CFGB Port 2 configuration B
P3CFGB Port 3 configuration B
470
471
472
473
4F0
4F1
4F2
4F3
PCON* Power control register
404
PSWH* Program status word (high byte) 401
PSWL* Program status word (low byte)
400
PSW51* 80C51 compatible PSW
402
Note 5
Note 5
Note 5
Note 5
Note 5
Note 5
Note 5
Note 5
227 226 225 224 223 222 221 220
— — — — — — PD IDL 00
20F 20E 20D 20C 20B 20A 209 208
SM TM RS1 RS0 IM3 IM2 IM1 IM0 Note 2
207 206 205 204 203 202 201 200
C AC — — — V N Z Note 2
217 216 215 214 213 212 211 210
C AC F0 RS1 RS0 V F1 P Note 3
RTH0
RTH1
RTL0
RTL1
Timer 0 extended reload,
high byte
Timer 1 extended reload,
high byte
Timer 0 extended reload, low byte
Timer 1 extended reload, low byte
455
457
454
456
00
00
00
00
307 306 305 304 303 302 301 300
S0CON* Serial port 0 control register
420 SM0_0 SM1_0 SM2_0 REN_0 TB8_0 RB8_0 TI_0 RI_0
00
30F 30E 30D 30C 30B 30A 309 308
S0STAT* Serial port 0 extended status
421 — — — — FE0 BR0 OE0 STINT0 00
S0BUF
S0ADDR
S0ADEN
Serial port 0 buffer register
Serial port 0 address register
Serial port 0 address enable
register
460
461
462
x
00
00
327 326 325 324 323 322 321 320
S1CON* Serial port 1 control register
424 SM0_1 SM1_1 SM2_1 REN_1 TB8_1 RB8_1 TI_1 RI_1
00
32F 32E 32D 32C 32B 32A 329 328
S1STAT* Serial port 1 extended status
425 — — — — FE1 BR1 OE1 STINT1 00
S1BUF
S1ADDR
S1ADEN
Serial port 1 buffer register
Serial port 1 address register
Serial port 1 address enable
register
464
465
466
x
00
00
SCR
System configuration register
SSEL*
SWE
Segment selection register
Software Interrupt Enable
440
— PT1 PT0 CM PZ
00
21F 21E 21D 21C 21B 21A 219 218
403 ESWEN R6SEG R5SEG R4SEG R3SEG R2SEG R1SEG R0SEG 00
47A — SWE7 SWE6 SWE5 SWE4 SWE3 SWE2 SWE1 00
2002 Mar 25
6







XA-G37 equivalent, schematic
Philips Semiconductors
XA 16-bit microcontroller family
32K OTP, 512 B RAM, watchdog, 2 UARTs
WATCHDOG FEED SEQUENCE
MOV WFEED1,#A5H
MOV WFEED2,#5AH
TCLK
PRESCALER
Product data
XA-G37
WDL
8–BIT DOWN
COUNTER
INTERNAL RESET
PRE2
PRE1
PRE0
— WDRUN WDTOF
WDCON
Figure 10. Watchdog Timer in XA-G37
SU00581A
When the watchdog underflows, the following action takes place
(see Figure 10):
Autoload takes place.
Watchdog time-out flag is set
Watchdog run bit unchanged.
Autoload (WDL) register unchanged.
Prescaler tap unchanged.
All other device action same as external reset.
Note that if the watchdog underflows, the program counter will be
loaded from the reset vector as in the case of an internal reset. The
watchdog time-out flag can be examined to determine if the
watchdog has caused the reset condition. The watchdog time-out
flag bit can be cleared by software.
WDCON Register Bit Definitions
WDCON.7 PRE2
Prescaler Select 2, reset to 1
WDCON.6 PRE1
Prescaler Select 1, reset to 1
WDCON.5 PRE0
Prescaler Select 0, reset to 1
WDCON.4 —
WDCON.3 —
WDCON.2 WDRUN Watchdog Run Control bit, reset to 1
WDCON.1 WDTOF Timeout flag
WDCON.0 —
UARTs
The XA-G37 includes 2 UART ports that are compatible with the
enhanced UART used on the 8xC51FB. Baud rate selection is
somewhat different due to the clocking scheme used for the XA
timers.
Some other enhancements have been made to UART operation.
The first is that there are separate interrupt vectors for each UART’s
transmit and receive functions. The UART transmitter has been
double buffered, allowing packed transmission of data with no gaps
between bytes and less critical interrupt service routine timing. A
break detect function has been added to the UART. This operates
independently of the UART itself and provides a start-of-break status
bit that the program may test. Finally, an Overrun Error flag has
been added to detect missed characters in the received data
stream. The double buffered UART transmitter may require some
software changes in code written for the original XA-G37 single
buffered UART.
Each UART baud rate is determined by either a fixed division of the
oscillator (in UART modes 0 and 2) or by the timer 1 or timer 2
overflow rate (in UART modes 1 and 3).
Timer 1 defaults to clock both UART0 and UART1. Timer 2 can be
programmed to clock either UART0 through T2CON (via bits R0CLK
and T0CLK) or UART1 through T2MOD (via bits R1CLK and
T1CLK). In this case, the UART not clocked by T2 could use T1 as
the clock source.
The serial port receive and transmit registers are both accessed at
Special Function Register SnBUF. Writing to SnBUF loads the
transmit register, and reading SnBUF accesses a physically
separate receive register.
The serial port can operate in 4 modes:
Mode 0: Serial I/O expansion mode. Serial data enters and exits
through RxDn. TxDn outputs the shift clock. 8 bits are
transmitted/received (LSB first). (The baud rate is fixed at 1/16 the
oscillator frequency.)
Mode 1: Standard 8-bit UART mode. 10 bits are transmitted
(through TxDn) or received (through RxDn): a start bit (0), 8 data
bits (LSB first), and a stop bit (1). On receive, the stop bit goes into
RB8 in Special Function Register SnCON. The baud rate is variable.
Mode 2: Fixed rate 9-bit UART mode. 11 bits are transmitted
(through TxD) or received (through RxD): start bit (0), 8 data bits
(LSB first), a programmable 9th data bit, and a stop bit (1). On
Transmit, the 9th data bit (TB8_n in SnCON) can be assigned the
value of 0 or 1. Or, for example, the parity bit (P, in the PSW) could
be moved into TB8_n. On receive, the 9th data bit goes into RB8_n
in Special Function Register SnCON, while the stop bit is ignored.
The baud rate is programmable to 1/32 of the oscillator frequency.
Mode 3: Standard 9-bit UART mode. 11 bits are transmitted
(through TxDn) or received (through RxDn): a start bit (0), 8 data
bits (LSB first), a programmable 9th data bit, and a stop bit (1).
In fact, Mode 3 is the same as Mode 2 in all respects except baud
rate. The baud rate in Mode 3 is variable.
In all four modes, transmission is initiated by any instruction that
uses SnBUF as a destination register. Reception is initiated in
Mode 0 by the condition RI_n = 0 and REN_n = 1. Reception is
initiated in the other modes by the incoming start bit if REN_n = 1.
2002 Mar 25
14










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