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PDF ( 数据手册 , 数据表 ) AD5063

零件编号 AD5063
描述 (AD5062 / AD5063) Full Accurate 16 Bit Vout nanoDac
制造商 Analog Devices
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AD5063 数据手册, 描述, 功能
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Full Accurate 16 Bit Vout nanoDacTM,
2.7V- 5.5V, in a Sot 23
Preliminary Technical Data
FEATURES
Single 16-Bit DAC, 1Lsb inl.
1.8 Volt Digital Interface Capability
Power-On-Reset to Zero Volts/Mid Scale
Three Power-Down Functions
Low Power Serial Interface with Schmitt-
Triggered Inputs
8-Lead Sot23, 10-Lead MSOP Package
Low Power
Fast Settling 3us.
2.7-5.5 V Power Supply
Low Glitch on Powerup.
Unbuffered Voltage Capable of driving
60k Ohm load.
APPLICATIONS
Process Control
Data Acquisition Systems
Portable Battery Powered Instruments
Digital Gain and Offset Adjustment
Programmable Voltage and Current Sources
Programmable Attenuators
GENERAL DESCRIPTION
The AD5062/AD5063, a member of the nanoDACTM family,
are single 16-bit unbuffered voltage out DACs that operate
from a single 2.7-5V supply. The AD5062 version is available
in a 8 ld Sot23. The AD5063 version is available with on board
resistors in a 10 ld uSOIC, making it easy to generate bipolar
signals on the output.
The parts utilize a versatile three-wire serial interface that
operates at clock rates up to 30 MHz and is compatible with
standard SPI™, QSPI™, MICROWIRE™ and DSP interface
standards.
The reference for AD5062/AD5063 is supplied from an
external REF pin. A reference buffer is also provided on chip.
The part incorporates a power-on-reset circuit that ensures that
the DAC output powers up to zero volts/ mid scale and remains
there until a valid write takes place to the device. The part
contains a power-down feature that reduces the current
consumption of the device to 50nA at 5 V and provides
software selectable output loads while in power-down mode.
The part is put into power-down mode over the serial interface.
Total unadjusted error for the part is <1mV.
These parts also provide a very low glitch on power-up.
AD5062/AD5063
AD5062 8 Ld Sot23.
AD5063. 10 Ld MSOP.
Part Number
AD5061
AD5040/60
Description
2.7 V to 5.5 V, 16 Bit nanoDACTM D/A, 4 LSBs INL,
Sot 23
2.7 V to 5.5 V, 14/16 Bit nanoDACTM D/A, 1 LSBs
INL, Sot23.
PRODUCT HIGHLIGHTS
1. Available in 8-lead SOT23, 10-lead MSOP.
2. 16 Bit Accurate, 1 LSB INL.
3. Low Glitch on Power-up.
4. High speed serial interface with clock speeds up to 30 MHz.
5. Three power down modes available to the user.
Rev. PrB
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
Rev. Pr B | Page 1 of 17







AD5063 pdf, 数据表
AD5062/AD5063
INL Linearity Plot
1
0.6
0.2
-0.2
-0.6
-1
DAC Code
Figure 4. Typical INL Plot
Preliminary Technical Data
DNL Linearity Plot
1
0.6
0.2
-0.2
-0.6
-1
DAC Code
Figure 6. Typical DNL PloT.
Figure 5. Zero Scale Error and Full Scale Error vs. Temperature
Figure 7. INL & DNLvs Supply
Figure 8. Idd Histogram @ Vdd=3/5 Volts.
Rev. Pr B | Page 8 of 17







AD5063 equivalent, schematic
AD5062/AD5063
Figure 31. The power supply to the part also needs to be
isolated. This is done by using a transformer. On the DAC side
of the transformer, a +5 V regulator provides the +5 V supply
required for the AD5062/AD5063.
POWER
+5V
REGULATOR
10. F 0.1. F
SCLK
SDI
V1A
VOA
ADMu103x
V1B
VOB
SCLK
VDD
DAC
SDI
VOUT
DATA
V1C
VOC
DIN
GND
Figure 31. AD5062/AD5063 with An Opto-Isolated Interface
Power Supply Bypassing and Grounding
When accuracy is important in a circuit it is helpful to carefully
consider the power supply and ground return layout on the
board. The printed circuit board containing the
AD5062/AD5063 should have separate analog and digital
sections, each having its own area of the board. If the
AD5062/AD5063 is in a system where other devices require an
Preliminary Technical Data
AGND to DGND connection, the connection should be
made at one point only. This ground point should be
as close as possible to the AD5062/AD5063.
The power supply to the AD5062/AD5063 should be
bypassed with
10 µF and 0.1 µF capacitors. The capacitors should be
physically as close as possible to the device with the 0.1 µF
capacitor ideally right up against the device. The 10 µF
capacitors are the tantalum bead type. It is important that the
0.1 µF capacitor has low Effective Series Resistance (ESR) and
Effective Series Inductance (ESI), e.g., common ceramic types
of capacitors. This 0.1 µF capacitor provides a low impedance
path to ground for high frequencies caused by transient
currents due to internal logic switching.
The power supply line itself should have as large a trace as
possible to provide a low impedance path and reduce glitch
effects on the supply line. Clocks and other fast switching
digital signals should be shielded from other parts of
the board by digital ground. Avoid crossover of digital and
analog signals if possible. When traces cross on opposite sides
of the board, ensure that they run at right angles to each other
to reduce feedthrough effects through the board. The best
board layout technique is the microstrip technique where the
component side of the board is dedicated to the ground plane
only and the signal traces are placed on the solder side.
However, this is not always possible with a two-layer board.
Rev. Pr B | Page 16 of 17










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