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PDF ( 数据手册 , 数据表 ) S71GS128N

零件编号 S71GS128N
描述 (S71GS128N / S71GS256N) 128N based MCPs
制造商 SPANSION
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S71GS128N 数据手册, 描述, 功能
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S71GS256/128N based MCPs
Stacked Multi-Chip Product (MCP)
M21.58e6mV/12oV8rIOyMweMgiitarhrbo6itr4B(/31i62t/T8MMMUegnxaif1bo6ir-tbm(i4t)S/2eCMcMtxoOr16SP-ba3.gi0te)-V1m.o8loVtdVepCSFCRlaAasnMhd
Data Sheet
ADVANCE
INFORMATION
Distinctive Characteristics
MCP Features
Power supply voltage
— Flash Memory
VCC: 2.7V to 3.1V
VIO: 1.65V to 1.95V
— pSRAM
VCC: 1.7 V to 1.95 V
High Performance
110 ns access time
30 ns page read times
Packages:
— 8.0x11.6x1.2 mm FBGA (TLA084)
Operating Temperature
— -25°C to +85°C (Wireless)
General Description
The S71GS Series is a product line of stacked Multi-chip Product (MCP) packages
and consists of
One S29GL Flash memory die with 1.8 V VIO
one 1.8 V pSRAM (Note)
Note: Burst mode features of the pSRAM in the S71GS family of MCPs is not avail-
able. This MCP uses the page mode operation which utilizes the page mode Flash
and page mode feature-set of the pSRAM.
Publication Number S71GS256/128N_00 Revision A Amendment 0 Issue Date December 17, 2004
This document contains information on a product under development at Spansion, LLC. The information is intended to help you evaluate this product. Do not design in
this product without contacting the factory. Spansion reserves the right to change or discontinue work on this proposed product without notice.







S71GS128N pdf, 数据表
Advance Information
(128 Mb Flash + 32 Mb pSRAM)
F-VIO
F-VCC
Flash-only Address
Shared Address
WP#/ACC
F1-CE#
OE#
WE#
F-RST#
R-VCC
R-UB#
R-LB#
CRE
R-CE1#
2
21
F-VCC VIO
DQ15 to DQ0
WP#/ACC
CE#
OE#
WE#
F-RST#
Flash
RY/BY#
16
21 R-VCC R-VIO
I/O15 to I/O0
WE#
OE# pSRAM
UB#
LB#
CRE
R-CE1#
VSSQ
16
DQ15 to DQ0
RY/BY#
VSS
8 S71GS256/128N_00_A0 December 17, 2004







S71GS128N equivalent, schematic
S29GLxxxN MirrorBitTM Flash Family
S29GL512N, S29GL256N, S29GL128N
512 Megabit, 256 Megabit, and 128 Megabit, 3.0 Volt-only
Page Mode Flash Memory featuring 110 nm MirrorBit
process technology
Data Sheet
ADVANCE
INFORMATION
Distinctive Characteristics
Architectural Advantages
„ Single power supply operation
— 3 volt read, erase, and program operations
„ Enhanced VersatileI/Ocontrol
— All input levels (address, control, and DQ input levels)
and outputs are determined by voltage on VIO input.
VIO range is 1.65 to VCC
„ Manufactured on 110 nm MirrorBit process
technology
„ Secured Silicon Sector region
— 128-word/256-byte sector for permanent, secure
identification through an 8-word/16-byte random
Electronic Serial Number, accessible through a
command sequence
— May be programmed and locked at the factory or by
the customer
„ Flexible sector architecture
— S29GL512N: Five hundred twelve 64 Kword (128
Kbyte) sectors
— S29GL256N: Two hundred fifty-six 64 Kword (128
Kbyte) sectors
— S29GL128N: One hundred twenty-eight 64 Kword
(128 Kbyte) sectors
„ Compatibility with JEDEC standards
— Provides pinout and software compatibility for single-
power supply flash, and superior inadvertent write
protection
„ 100,000 erase cycles per sector typical
„ 20-year data retention typical
Performance Characteristics
„ High performance
— 90 ns access time (S29GL128N, S29GL256N,
S29GL512N)
— 8-word/16-byte page read buffer
— 25 ns page read times
— 16-word/32-byte write buffer reduces overall
programming time for multiple-word updates
„ Low power consumption (typical values at 3.0 V, 5
MHz)
— 25 mA typical active read current;
— 50 mA typical erase/program current
— 1 µA typical standby mode current
Software & Hardware Features
„ Software features
— Program Suspend & Resume: read other sectors
before programming operation is completed
— Erase Suspend & Resume: read/program other
sectors before an erase operation is completed
— Data# polling & toggle bits provide status
— Unlock Bypass Program command reduces overall
multiple-word programming time
— CFI (Common Flash Interface) compliant: allows host
system to identify and accommodate multiple flash
devices
„ Hardware features
— Advanced Sector Protection
— WP#/ACC input accelerates programming time
(when high voltage is applied) for greater throughput
during system production. Protects first or last sector
regardless of sector protection settings
— Hardware reset input (RESET#) resets device
— Ready/Busy# output (RY/BY#) detects program or
erase cycle completion
Publication Number S29GLxxxN_MCP Revision A Amendment 1 Issue Date December 15, 2004
This document contains information on a product under development at Spansion LLC. The information is intended to help you evaluate this product. Spansion LLC
reserves the right to change or discontinue work on this proposed product without notice.










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