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PDF ( 数据手册 , 数据表 ) QT60486

零件编号 QT60486
描述 (QT60326 / QT60486) 32 & 48 KEY QMATRIX ICs
制造商 QUANTUM
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QT60486 数据手册, 描述, 功能
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lQ
QT60326, QT60486
32 & 48 KEY QMATRIX™ ICs
z Advanced second generation QMatrix™ controller
z Keys individually adjustable for sensitivity, response
time, and many other critical parameters
z Panel thicknesses to 50mm through any dielectric
z 32 and 48 key versions
z 100% autocal for life - no in-field adjustments
z SPI Slave and UART interfaces
z Sleep mode with wake pin
z Adjacent key suppression feature
z Synchronous noise suppression pin
z Spread-spectrum modulation: high noise immunity
z Mix and match key sizes & shapes in one panel
z Low overhead communications protocol
z FMEA compliant design features
z Negligible external component count
z Extremely low cost per key
z 44-pin Pb-free TQFP package
MOSI
MISO
SCK
/RST
Vdd
Vss
XT2
XT1
RX
TX
WS
144 43 42 41 40 39 38 37 36 35 3343
2 32
3 31
4 QT60326 30
5 QT60486 29
6 28
7
8
TQFP-44
27
26
9 25
10 24
11
12
13
14
15
16
17
18
19
20
23
21 22
Y3B
Y2B
Y1B
Y0B
Vdd
Vss
Vdd
X7
X6
X5
X4
APPLICATIONS -
y Security keypanels
y Industrial keyboards
y Appliance controls
y Outdoor keypads
y ATM machines
y Touch-screens
y Automotive panels
y Machine tools
These digital charge-transfer (“QT”) QMatrix™ ICs are designed to detect human touch on up 48 keys when used with a scanned,
passive X-Y matrix. They will project touch keys through almost any dielectric, e.g. glass, plastic, stone, ceramic, and even wood, up to
thicknesses of 5 cm or more. The touch areas are defined as simple 2-part interdigitated electrodes of conductive material, like copper
or screened silver or carbon deposited on the rear of a control panel. Key sizes, shapes and placement are almost entirely arbitrary;
sizes and shapes of keys can be mixed within a single panel of keys and can vary by a factor of 20:1 in surface area. The sensitivity of
each key can be set individually via simple functions over the SPI or UART port, for example via Quantum’s QmBtn program, or from a
host microcontroller. Key setups are stored in an onboard eeprom and do not need to be reloaded with each powerup.
These devices are designed specifically for appliances, electronic kiosks, security panels, portable instruments, machine tools, or
similar products that are subject to environmental influences or even vandalism. It can permit the construction of 100% sealed,
watertight control panels that are immune to humidity, temperature, dirt accumulation, or the physical deterioration of the panel surface
from abrasion, chemicals, or abuse. To this end the device contains Quantum-pioneered adaptive auto self-calibration, drift
compensation, and digital filtering algorithms that make the sensing function robust and survivable.
The parts can scan matrix touch keys over LCD panels or other displays when used with clear ITO electrodes arranged in a matrix.
They do not require 'chip on glass' or other exotic fabrication techniques, thus allowing the OEM to source the matrix from multiple
vendors. Materials such as such common PCB materials or flex circuits can be used.
External circuitry consists of a resonator and a few passive parts, all of which can fit into a 6.5 sq cm footprint (1 sq inch). Control and
data transfer is via either an SPI or UART port.
These devices make use of an important new variant of charge-transfer sensing, transverse charge-transfer, in a matrix format that
minimizes the number of required scan lines. Unlike older methods, it does not require one IC per key.
TA
-400C to +1050C
-400C to +1050C
AVAILABLE OPTIONS
# Keys
Part Number
32 QT60326-AS-G
48 QT60486-AS-G
LQ
Copyright © 2003-2005 QRG Ltd
QT60486-AS R8.01/0105







QT60486 pdf, 数据表
FMEA error flags are cleared. Any FMEA errors will be reported
as the tests are performed for the first time.
The FMEA testing is done on all enabled keys in the matrix, and
results are reported via the serial interface through a dedicated
status command (page 15). Disabled keys are not tested. The
existence of an error is also reported in normal key reporting
commands such as Report 1st Key, page 15.
Assuming no detect events occur, the real time that elapses
from the start of one sequence of FMEA tests to the start of the
next, i.e. the FMEA sequence time, never exceeds 2s.
Also, since the devices only communicate in slave mode, the
host can determine immediately if the QT has suffered a
catastrophic failure. The QT can also participate in
cross-checking the integrity of the host controller, and even
reset the host if no communications have been heard from it in
a short while (via the LED pin output, page 23).
The FMEA tests performed are:
ƒ X drive line shorts to Vdd and Vss
ƒ X drive line shorts to other pins
ƒ X drive signal deviation
ƒ Y line shorts to Vdd and Vss
ƒ Y line shorts to other pins
ƒ X to Y line shorts
ƒ Cs capacitor checks including shorts and opens
ƒ Vref test
Other tests incorporated into the devices include:
ƒ A test for signal levels against a preset min value (LSL
setup, see Section 5.15, page 23). If any signal level falls
below this level, an error flag is generated.
ƒ CRC communications checks on all critical command and
data transmissions.
ƒ ‘Last-command’ command to verify that an instruction was
properly received.
ƒ Loss of communications reset of the host controller.
For those applications requiring it, Quantum can supply sample
FMEA test data on special request.
lQ
8 QT60486-AS R8.01/0105







QT60486 equivalent, schematic
This command requires substantial amounts of time to process
and return a result; it is not recommended to use this command
except perhaps on startup or very infrequently.
Command response timing: The response to this command
can take as long as 20ms.
No CRC is appended to the response.
4.15 Return Last Command - 0x0f
This command returns the last received command character, in
1’s complement (inverted). If the command is repeated twice or
more, it will return the inversion of 0x0f, 0xf0.
If a prior command was not valid or was corrupted, it will return
the bad command as well. This command also will reset the
communications error flag (Section 4.5).
No CRC is appended to the response.
4.16 Internal Code - 0x10
This command returns an internal code, as a value from 0..255.
A CRC byte is appended to the response; this CRC folds in the
command 0x10 itself initially.
4.17 Internal Code - 0x11
This command returns an internal code word (3 bytes) of the
part for factory diagnostic purposes.
A CRC byte is appended to the response; this CRC folds in the
command 0x11 itself initially.
4.18 Internal Code - 0x12
This command returns an internal code word (2 bytes) of the
part for factory diagnostic purposes.
No CRC is appended to the response.
4.19 Sleep - 0x16
The command must be repeated 2x within 100ms or the
command will fail. After the 2nd 0x16 from the host, the device
will reply with the character 0xE9, then sleep. On wake from
Sleep, the device will issue a 0x01 character back to the host.
Communications response timing: Responses to this
command may take from a few microseconds up to 5ms,
depending on what the device was doing at the moment the
command arrived.
After the response, the device will enter low power sleep mode
until awakened by a >10µs low level on the WS pin. When it
wakes, it will resume current operation in the state from which it
exited and attempt to send a 0x01 code back to the host to
signal that it is ready to communicate again.
During Sleep the DRDY pin is held low, and released once the
device awakes and is ready to return the 0x01 code.
The WS pin can be connected to Rx or /SS to provide a ‘free’
wakeup connection from the host controller. In SPI mode with
/SS tied to WS, a /SS toggle (any low pulse of at least 10µs)
under software control from the host controller without an actual
SPI transmission will wake the device.
In UART mode, with Rx tied to WS a 0xFF byte should be sent
to provide a pulse on WS. The start bit of the 0xFF forms a
convenient, narrow wake pulse without being long enough to be
interpreted as a byte during the wake operation.
A recommended method to reestablish communications after
Wake from Sleep is to send the QT device a 0x0F ('Last
Command' command) repeatedly until the correct response
comes back (the command's own compliment, i.e. 0xF0).
If Sync mode is also enabled, the part will assume the wakeup
pulse is also a sync signal, and resume scanning starting with
Key 0 (which is not necessarily where it left off scanning when it
went to sleep).
WS Note: The device checks the WS pin and waits for it to
return high before the part actually begins sleep. There is a
timeout limit on this wait of ~2s; if the WS pin has not gone high
after this time, the part will reset itself.
4.20 Data Set for One Key - 0x4k
Returns the data set for key k, where k = {0..47} To form this
command, the key number is logical-OR’d into the byte 0x40.
This command returns 5 bytes, in the sequence:
Signal (2 bytes)
Reference (2 bytes)
Normal Detect Integrator (1 byte)
Signal and Reference are returned LSByte first.
No CRC is appended.
4.21 Status for Key ‘k’ - 0x8k
Returns a bitfield for key ‘k’ where k is from {0..47}. The bitfield
indicates as follows:
BIT Description
7 1= reserved
6 1= reserved
5 1= reserved
4 1= key is enabled
3 1= key is in detect
2 1= signal ref < LSL (low signal error)
1 1= key is undergoing calibration
0 1= cal on this key failed 5 times
Bit 2 - LSL notes: See page 23.
A CRC byte is appended to the response; this CRC folds in the
command 0x8k itself initially.
4.22 Cal Key ‘k’ - 0xck
This command must be repeated 2x within 100ms or the
command will fail; the repeating command must be sequential
without any intervening command.
This command functions the same as 0x03 CAL command
except this command only affects one key ‘k’ where ‘k’ is from 0
to 47.
The chosen key ‘k’ is recalibrated in its native timeslot; normal
running of the part is not interrupted and all other keys operate
correctly throughout. This command is for use only during
normal operation to try to recover a single key that has failed or
is not calibrated correctly.
Returns the 1’s compliment of 0xck just before the key is
recalibrated.
4.23 Command Sequencing
To interface the device with a host, the flow diagram of Figure
4-1, page 17, is suggested. The actual settings of the Setups
block used should normally just be the default settings except
lQ
16 QT60486-AS R8.01/0105










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