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PDF ( 数据手册 , 数据表 ) ADV7320

零件编号 ADV7320
描述 (ADV7320 / ADV7321) Multiformat 216 MHz Video Encoder
制造商 Analog Devices
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ADV7320 数据手册, 描述, 功能
Multiformat 216 MHz
Video Encoder with Six NSV® 12-Bit DACs
ADV7320/ADV7321
FEATURES
High definition (HD) input formats
16-/20-, 24-/30-bit (4:2:2, 4:4:4) parallel YCrCb
Fully compliant with
SMPTE 274M (1080i, 1080p @ 74.25 MHz)
SMPTE 296M (720p)
SMPTE 240M (1035i)
RGB in 3-bit × 10-bit 4:4:4 input format
HDTV RGB supported
RGB, RGBHV
Other HD formats using async timing mode
Enhanced definition (ED) input formats
8-/10-, 16-/20-, 24-/30-bit (4:2:2, 4:4:4) parallel YCrCb
SMPTE 293M (525p)
BTA T-1004 EDTV2 (525p)
ITU-R BT.1358 (625p/525p)
ITU-R BT.1362 (625p/525p)
RGB in 3-bit × 10-bit 4:4:4 input format
Standard definition (SD) input formats
CCIR-656 4:2:2 8-/10-bit or 16-/20-bit parallel input
HD output formats
YPrPb HDTV (EIA 770.3)
RGB, RGBHV
CGMS-A (720p/1080i)
ED output formats
Macrovision® Rev 1.2 (525p/625p) (ADV7320 only)
CGMS-A (525p/625p)
YPrPb progressive scan (PS) (EIA-770.1, EIA-770.2)
RGB, RGBHV
SD output formats
Composite NTSC M/N
Composite PAL M/N/B/D/G/H/I, PAL-60
SMPTE 170M NTSC-compatible composite video
ITU-R BT.470 PAL-compatible composite video
S-video (Y/C)
EuroScart RGB
Component YPrPb (Betacam, MII, SMPTE/EBU N10)
Macrovision Rev 7.1.L1 (ADV7320 only)
CGMS/WSS
Closed captioning
GENERAL FEATURES
Simultaneous SD/HD or PS/SD inputs and outputs
Oversampling up to 216 MHz
Programmable DAC gain control
Sync outputs in all modes
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
On-board voltage reference
Six 12-bit NSV (noise shaped video) precision video DACs
2-wire serial I2C® interface, open-drain configuration
Dual I/O supply 2.5 V/3.3 V operation
Analog and digital supply 2.5 V
On-board PLL
64-lead LQFP package
Lead (Pb) free product
APPLICATIONS
EVD (enhanced versatile disk) players
High-end SD/PS DVD recorders/players
SD/PS/HDTV display devices
SD/HDTV set top boxes
Professional video systems
FUNCTIONAL BLOCK DIAGRAM
Y9–Y0
C9–C0
S9–S0
HSYNC
VSYNC
BLANK
CLKIN_A
CLKIN_B
STANDARD DEFINITION
CONTROL BLOCK
COLOR CONTROL
BRIGHTNESS
DNR
GAMMA
PROGRAMMABLE
FILTERS
SD TEST PATTERN
D
E PROGRAMMABLE
M RGB MATRIX
U
X
TIMING
GENERATOR
HIGH DEFINITION
CONTROL BLOCK
HD TEST PATTERN
COLOR CONTROL
ADAPTIVE FILTER CTRL
SHARPNESS FILTER
PLL
ADV7320/
ADV7321
12-BIT
DAC
O 12-BIT
V DAC
E
R
S
A
12-BIT
DAC
M
P 12-BIT
L DAC
I
N 12-BIT
G DAC
12-BIT
DAC
I2C
INTERFACE
Figure 1.
GENERAL DESCRIPTION
The ADV®7320/ADV7321 are high speed, digital-to-analog
encoders on single monolithic chips. They include six high
speed NSV video DACs with TTL-compatible inputs. They have
separate 8-/10-, 16-/20-, and 24-/30-bit input ports that accept
data in high definition (HD) and/or standard definition (SD)
video format. For all standards, external horizontal, vertical,
and blanking signals, or EAV/SAV timing codes, control the
insertion of appropriate synchronization signals into the digital
data stream and, therefore, the output signal.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.







ADV7320 pdf, 数据表
ADV7320/ADV7321
TIMING SPECIFICATIONS
VAA = 2.375 V to 2.625 V, VDD = 2.375 V to 2.625 V, VDD_IO = 2.375 V to 3.6 V, VREF = 1.235 V, RSET = 3040 Ω, RLOAD = 300 Ω. All
specifications TMIN to TMAX (0°C to 70°C), unless otherwise noted.
Table 4.
Parameter
MPU PORT1
SCLOCK Frequency
SCLOCK High Pulse Width, t1
SCLOCK Low Pulse Width, t2
Hold Time (Start Condition), t3
Setup Time (Start Condition), t4
Data Setup Time, t5
SDATA, SCLOCK Rise Time, t6
SDATA, SCLOCK Fall Time, t7
Setup Time (Stop Condition), t8
RESET Low Time
Min Typ Max Unit
0 400 kHz
0.6 μs
1.3 μs
0.6 μs
0.6 μs
100 ns
300 ns
300 ns
0.6 μs
100 ns
Test Conditions
First clock generated after this period relevant for
repeated start condition
ANALOG OUTPUTS
Analog Output Delay2
Output Skew
CLOCK CONTROL AND PIXEL PORT3
fCLK
fCLK
Clock High Time, t9
Clock Low Time, t10
Data Setup Time, t111
Data Hold Time, t121
SD Output Access Time, t13
SD Output Hold Time, t14
HD Output Access Time, t13
HD Output Hold Time, t14
PIPELINE DELAY4
7
1
81
40
40
2.0
2.0
5.0
5.0
63
76
35
41
36
ns
ns
29.5 MHz
MHz
% of one clock cycle
% of one clock cycle
ns
ns
15 ns
ns
14 ns
ns
Clock cycles
Clock cycles
Clock cycles
Clock cycles
Clock cycles
SD PAL square pixel mode
PS/HD async mode
SD (2×, 16×)
SD component mode (16×)
PS (1×)
PS (8×)
HD (2×, 1×)
1 Guaranteed by characterization.
2 Output delay measured from the 50% point of the rising edge of CLOCK to the 50% point of DAC output full-scale transition.
3 Data: C[9:0], Y[9:0], S[9:0]; Control: P_HSYNC, P_VSYNC, P_BLANK, S_HSYNC, S_VSYNC, S_BLANK.
4 SD, PS = 27 MHz; HD = 74.25 MHz.
Rev. A | Page 8 of 88







ADV7320 equivalent, schematic
ADV7320/ADV7321
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter1
Value
VAA to AGND
VDD to DGND
VDD_IO to GND_IO
Digital Input Voltage to DGND
VAA to VDD
AGND to DGND
DGND to GND_IO
AGND to GND_IO
Ambient Operating Temperature (TA)
Storage Temperature (TS)
Infrared Reflow Soldering (20 sec)
−0.3 V to +3.0 V
−0.3 V to +3.0 V
−0.3 V to +4.6 V
−0.3 V to VDD_IO +0.3 V
−0.3 V to +0.3 V
−0.3 V to +0.3 V
−0.3 V to +0.3 V
−0.3 V to +0.3 V
0°C to 70°C
–65°C to +150°C
260°C
1 Analog output short circuit to any power supply or common can be of
an indefinite duration.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL CHARACTERISTICS
θJC = 11°C/W
θJA = 47°C/W
The ADV7320/ADV7321 are Pb-free, environmentally friendly
products. They are manufactured using the most up-to-date
materials and processes. The coating on the leads of each device
is 100% pure Sn electroplate. The devices are suitable for Pb-
free applications and are able to withstand surface-mount
soldering up to 255°C (±5°C).
In addition, they are backward-compatible with conventional
SnPb soldering processes. This means that the electroplated Sn
coating can be soldered with Sn/Pb solder pastes at conventional
reflow temperatures of 220°C to 235°C.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. A | Page 16 of 88










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