DataSheet8.cn


PDF ( 数据手册 , 数据表 ) ADF4252

零件编号 ADF4252
描述 Dual Fractional-N/Integer-N Frequency Synthesizer
制造商 Analog Devices
LOGO Analog Devices LOGO 


1 Page

No Preview Available !

ADF4252 数据手册, 描述, 功能
Data Sheet
Dual Fractional-N/Integer-N
Frequency Synthesizer
ADF4252
FEATURES
GENERAL DESCRIPTION
3.0 GHz fractional-N/1.2 GHz integer-N
2.7 V to 3.3 V power supply
Separate VP allows extended tuning voltage to 5 V
Programmable dual modulus prescaler
RF: 4/5, 8/9
IF: 8/9, 16/17, 32/33, 64/65
Programmable charge pump currents
3-wire serial interface
Digital lock detect
Power-down mode
Programmable modulus on fractional-N synthesizer
Trade off noise vs. spurious performance
APPLICATIONS
Base stations for mobile radio (GSM, PCS, DCS, CDMA, WCDMA)
Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA)
Wireless LANs
Communications test equipment
CATV equipment
The ADF4252 is a dual fractional-N/integer-N frequency
synthesizer that can be used to implement local oscillators (LO)
in the upconversion and downconversion sections of wireless
receivers and transmitters. Both the RF and IF synthesizers
consist of a low noise digital phase frequency detector (PFD), a
precision charge pump, and a programmable reference divider.
The RF synthesizer has a Σ-Δ-based fractional interpolator that
allows programmable fractional-N division. The IF synthesizer
has programmable integer-N counters. A complete phase-locked
loop (PLL) can be implemented if the synthesizer is used with
an external loop filter and voltage controlled oscillator (VCO).
Control of all the on-chip registers is via a simple 3-wire interface.
The device operates with a power supply ranging from 2.7 V to
3.3 V and can be powered down when not in use.
FUNCTIONAL BLOCK DIAGRAM
VDD1 VDD2 VDD3 DVDD VP1 VP2
RSET
ADF4252
REFERENCE
REFIN
2
DOUBLER
4-BIT
R COUNTER
PHASE
FREQUENCY
DETECTOR
CHARGE
PUMP
CPRF
REFOUT
MUXOUT
OUTPUT
MUX
LOCK
DETECT
CLK
DATA
LE
24-BIT
DATA
REGISTER
FRACTIONAL-N
RF DIVIDER
INTEGER-N
IF DIVIDER
RFINA
RFINB
IFINB
IFINA
2
DOUBLER
15-BIT
R COUNTER
PHASE
FREQUENCY
DETECTOR
CHARGE
PUMP
CPIF
Figure 1.
AGND1 AGND2 DGND CPGND1 CPGND2
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2003–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com







ADF4252 pdf, 数据表
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADF4252
CPRF 1
CPGND1 2
RFINA 3
RFINB 4
AGND1 5
MUXOUT 6
ADF4252
TOP VIEW
18 CPGND2
17 DVDD
16 IFINA
15 IFINB
14 AGND2
13 RSET
NOTES
1. THE EXPOSED PAD MUST BE CONNECTED TO AGND.
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Function
1 CPRF
RF Charge Pump Output. This pin is normally connected to a loop filter that drives the input to an external VCO.
2
CPGND1
RF Charge Pump Ground.
3 RFINA Input to the RF Prescaler. This small signal input is normally taken from the VCO.
4 RFINB Complementary Input to the RF Prescaler.
5
AGND1
Analog Ground for the RF Synthesizer.
6 MUXOUT This multiplexer output allows either the RF or IF lock detect, the scaled RF or IF, or the scaled reference frequency
to be accessed externally.
7 REFIN Reference Input. This pin is a CMOS input with a nominal threshold of VDD/2 and an equivalent input resistance of
100 kΩ. This input can be driven from a TTL or CMOS crystal oscillator.
8
REFOUT
Reference Output.
9 DGND
Digital Ground for the Fractional Interpolator.
10 CLK
Serial Clock Input. This serial clock is used to clock in the serial data to the registers. The data is latched into the shift
register on the CLK rising edge. This input is a high impedance CMOS input.
11 DATA
Serial Data Input. The serial data is loaded MSB first with the three LSBs being the control bits. This input is a high
impedance CMOS input.
12 LE
Load Enable, CMOS Input. When LE goes high, the data stored in the shift registers is loaded into one of the seven
latches, the latch being selected using the control bits.
13 RSET
Connecting a resistor between this pin and ground sets the minimum charge pump output current. The
relationship between ICP and RSET is ICP_MIN = 1.6875/RSET. Therefore, with RSET = 2.7 kΩ, ICP_MIN = 0.625 mA.
14 AGND2
Ground for the IF Synthesizer.
15 IFINB
Complementary Input to the IF Prescaler.
16 IFINA
Input to the IF Prescaler. This small signal input is normally taken from the IF VCO.
17 DVDD
Positive Power Supply for the Fractional Interpolator Section. Decoupling capacitors to the ground plane must be
placed as close as possible to this pin. DVDD must have the same voltage as VDD1, VDD2, and VDD3.
18 CPGND2 IF Charge Pump Ground.
19 CPIF
IF Charge Pump Output. This pin is normally connected to a loop filter that drives the input to an external VCO.
20 VP2
IF Charge Pump Power Supply. Decoupling capacitors to the ground plane must be placed as close as possible to
this pin. This voltage must be greater than or equal to VDD2.
21 VDD2
Positive Power Supply for the IF Section. Decoupling capacitors to the ground plane must be placed as close as
possible to this pin. VDD2 has a value 3 V ± 10%. VDD2 must have the same voltage as VDD1, VDD3, and DVDD.
22 VDD3
Positive Power Supply for the RF Digital Section. Decoupling capacitors to the ground plane must be placed as
close as possible to this pin. VDD3 has a value 3 V ± 10%. VDD3 must have the same voltage as VDD1, VDD2, and DVDD.
23 VDD1
Positive Power Supply for the RF Analog Section. Decoupling capacitors to the ground plane must be placed as
close as possible to this pin. VDD1 has a value 3 V ± 10%. VDD1 must have the same voltage as VDD2, VDD3, and DVDD.
24 VP1
RF Charge Pump Power Supply. Decoupling capacitors to the ground plane must be placed as close as possible to
this pin. This voltage must be greater than or equal to VDD1.
EPAD
Exposed Pad. The exposed pad must be connected to AGND.
Rev. C | Page 7 of 30







ADF4252 equivalent, schematic
Data Sheet
ADF4252
REGISTER MAPS
RF N DIVIDER REGISTER
8-BIT RF INTEGER VALUE (INT)
12-BIT RF FRACTIONAL VALUE (FRAC)
CONTROL
BITS
DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
P1 N8 N7 N6 N5 N4 N3 N2 N1 F12 F11 F10 F9 F8 F7 F6 F5 F4 F3 F2 F1 C3 (0) C2 (0) C1 (0)
RF R DIVIDER REGISTER
4-BIT RF R COUNTER
12-BIT INTERPOLATOR MODULUS VALUE (MOD)
CONTROL
BITS
DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
P3 P2 R4 R3 R2 R1 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 C3 (0) C2 (0) C1 (1)
RF CONTROL REGISTER
RESERVED
RF CP
CURRENT
SETTING
CONTROL
BITS
DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
N3 T3 T2 T1 N2 CP2 CP1 0
P8 N1 P6 P5 P4 C3 (0) C2 (1) C1 (0)
MASTER REGISTER
MUXOUT
CONTROL
BITS
DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
M4 M3 M2 M1 P12 P11 P10 P9 C3 (0) C2 (1) C1 (1)
IF N DIVIDER REGISTER
IF
PRESCALER
12-BIT IF B COUNTER
6-BIT IF A COUNTER
CONTROL
BITS
DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
P15 P14 P13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 A6 A5 A4 A3 A2 A1 C3 (1) C2 (0) C1 (0)
IF R DIVIDER REGISTER
15-BIT IF R COUNTER
CONTROL
BITS
DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
P16 R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 C3 (1) C2 (0) C1 (1)
IF CONTROL REGISTER
RF PHASE
RESYNC
RESERVED
IF CP CURRENT
SETTING
CONTROL
BITS
DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
PR3 PR2 T8 T7 PR1 CP3 CP2 CP1 P21 P20 P19 P18 P17 C3 (1) C2 (1) C1 (0)
Figure 34. Register Summary
Rev. C | Page 15 of 30










页数 30 页
下载[ ADF4252.PDF 数据手册 ]


分享链接

Link :

推荐数据表

零件编号描述制造商
ADF4251Dual Fractional-N/Integer-N Frequency SynthesizerAnalog Devices
Analog Devices
ADF4252Dual Fractional-N/Integer-N Frequency SynthesizerAnalog Devices
Analog Devices

零件编号描述制造商
STK15C88256-Kbit (32 K x 8) PowerStore nvSRAMCypress Semiconductor
Cypress Semiconductor
NJM4556DUAL HIGH CURRENT OPERATIONAL AMPLIFIERNew Japan Radio
New Japan Radio
EL1118-G5 PIN LONG CREEPAGE SOP PHOTOTRANSISTOR PHOTOCOUPLEREverlight
Everlight


DataSheet8.cn    |   2020   |  联系我们   |   搜索  |  Simemap