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PDF ( 数据手册 , 数据表 ) STA308

零件编号 STA308
描述 MULTICHANNEL DIGITAL AUDIO PROCESSOR
制造商 ST Microelectronics
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STA308 数据手册, 描述, 功能
STA308
MULTICHANNEL DIGITAL AUDIO PROCESSOR WITH DDX™
„ 8 DDXTM Channels Capability (24 bit)
„ From 32kHz to 192kHz Input Sample Rates
Supported
„ Volume Control from 0 to -127 dB (0.5 dB steps)
„ Variable Digital Gain from 0 to 24dB (0.5dB
steps) with Digital Limiter Functionality and
TQFP64
Variable Attack and Release Time
ORDERING NUMBER: STA308
„ I2S Inputs and Outputs
„ Individual Channel and Master Gain/
t(s)Attenuation
„ Individual Channel Mute and Zero Input Detect
ucAuto-Mute
d„ Selectable Serial Audio Data Interface
ro„ Bass/Treble Controls
P„ Channel Mapping of any Input to any
teProcessing/DDXTM Channel
le„ Active Crossover Capability
so„ DC Blocking Selectable High-Pass Filter
b„ Selectable Bass Management on Channel 6
O„ Selectable Adjacent Channel Mixing Capability
) -„ Selectable DDXTM Headphone Output on
t(sChannels 7 & 8
c„ Selectable Clock Input Ratio
du„ Selectable De-emphasis
ro„ Selectable DDXTM Ternary, or Binary PWM
Poutput
te„ AM Interference Reduction Mode
Obsole„ I2C Control
DESCRIPTION
The STA308 is a single chip solution for digital audio
processing and control in multi-channel applications.
It provides output capabilities for DDXTM (Direct Digi-
tal Amplification). In conjunction with a DDXTM power
device, it provides high-quality, high-efficiency, all
digital amplification. The device is extremely versatile
allowing for input of most digital formats including 6.1
channel and 192kHz, 24-bit DVD-Audio.
The internal 24-bit DSP allows for high resolution
processing at all standard input sample frequencies.
Processing includes volume control, filtering, bass
management, gain compression/limiting and PCM
and DDXTM outputs. Filtering includes five user-pro-
grammable 28-bit biquads for EQ per channel, as
well as bass, treble and DC blocking. External clock-
ing can be provided at 4 different ratios of the input
sample frequency. All sample frequencies are up-
sampled for processing. Each internal processing
channel can receive any input channel, allowing flex-
ibility and the ability to perform active digital cross-
over for powered loudspeaker systems.
The serial audio data interface accepts many differ-
ent formats, including the popular I2S format. Eight
channels of DDX processing are performed.
April 2010
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STA308 pdf, 数据表
STA308
2.1 COMMUNICATION PROTOCOL
2.1.1 Data Transition or change
Data changes on the SDA line must only occur when the SCL clock is low. SDA transition while the clock is
high is used to identify a START or STOP condition.
2.1.2 Start Condition
START is identified by a high to low transition of the data bus SDA signal while the clock signal SCL is stable
in the high state. A START condition must precede any command for data transfer.
2.1.3 Stop Condition
STOP is identified by low to high transition of the data bus SDA signal while the clock signal SCL is stable in the
high state. A STOP condition terminates communication between STA308 and the bus master.
2.1.4 Data Input
During the data input the STA308 samples the SDA signal on the rising edge of clock SCL. For correct device
operation the SDA signal must be stable during the rising edge of the clock and the data can change only when
the SCL line is low.
t(s)2.2 DEVICE ADDRESSING
cTo start communication between the master and the STA308, the master must initiate with a start condition.
uFollowing this, the master sends onto the SDA line 8-bits (MSB first) corresponding to the device select address
dand read or write mode.
roThe 7 most significant bits are the device address identifiers, corresponding to the I2C bus definition. In the
PSTA308 the I2C interface has two device addresses depending on the SA pin configuration, 0x30 or 0011000x
tewhen SA = 0, and 0x32 or 0011001x when SA = 1.
leThe 8th bit (LSB) identifies read or write operation RW, this bit is set to 1 in read mode and 0 for write mode.
oAfter a START condition the STA308 identifies on the bus the device address and if a match is found, it acknowl-
sedges the identification on SDA bus during the 9th bit time. The byte following the device identification byte is
bthe internal space address.
- O2.3 WRITE OPERATION
t(s)Following the START condition the master sends a device select code with the RW bit set to 0. The STA308
acknowledges this and the writes for the byte of internal address. After receiving the internal byte address the
cSTA308 again responds with an acknowledgement.
du2.3.1 Byte Write
roIn the byte write mode the master sends one data byte, this is acknowledged by the STA308. The master then
Pterminates the transfer by generating a STOP condition.
te2.3.2 Multi-byte Write
oleThe multi-byte write modes can start from any internal address. The master generating a STOP condition ter-
Obsminates the transfer.
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STA308 equivalent, schematic
STA308
3.3.4 Biquad Coefficient Link
BIT R/W RST NAME
DESCRIPTION
7 R/W
0
BQL
Biquad Link :
0 – Each Channel uses coefficient values
1- Each Channel uses Channel 1 coefficient values
For ease of use, all channels can use the biquad coefficients loaded into the Channel 1 Coefficient RAM space
by setting the BQL bit to 1. Then any EQ updates would only have to be performed once.
3.4 Configuration Register E (address 04h)
BIT
D7 D6
D5
D4 D3 D2 D1
D0
NAME
RES
SAOFB
SAO2
SAO1
SAO0
DEMP VOLEN
MIXE
RST 0 0
0
0 0 01
0
t(s)BIT R/W RST NAME
DESCRIPTION
uc0 R/W 0 MIXE Mix Enable: 0 – Normal Operation
d1 - Adjacent Channel Mix Mode
ProThe scale and mix functionality can be used to mix adjacent channels instead of for bass management. By set-
teting this bit(BME must be set to 0) odd channels will be mixed with their adjacent even channel and output in
the place of the even channel. The odd channel wills pass-through unscaled. The values used for this function
leare the same as for bass management. Since this function occurs post channel mapping a large number of
opossibilities are present for two channel mixing. Up to four mixed channels can be obtained.
bsBIT R/W RST NAME
DESCRIPTION
- O1 R/W 1 VOLEN Volume Enable: 0 – Volume Operation Bypassed
) 1 - Volume Operation Normal
t(sWhen VOLEN set to 1, volume operation is normal. When set to 0, volume operation is bypassed and the vol-
cume stages are all set to pass-through. This also eliminates the digital volume offset of ~-0.6dB that is used to
umap full-scale digital input to full DDX modulation output.
rodBIT R/W RST NAME
DESCRIPTION
P2 R/W 0 DEMP Deemphasis : 0 – No Deemphasis, 1- Deemphasis
leteBy setting this bit to one deemphasis will implemented on all channels. When this is used it takes the place of
sobiquad #1 in each channel and any coefficients using biquad #1 will be ignored. DSPB(DSP Bypass) bit must
Obbe set to 0 for Deemphasis to function.
BIT R/W RST
NAME
DESCRIPTION
3 R/W
4 R/W
0
0
SAO0
SAO1
Serial Audio Output Interface Format : Determines the interface
format of the output serial digital audio interface.
5 R/W
0
SAO2
The STA308 features a configurable digital serial audio interface. The settings of the SAIx bits determine how
the output to this interface is interpreted. Six formats are accepted.
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