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PDF ( 数据手册 , 数据表 ) JS28F256P30T85

零件编号 JS28F256P30T85
描述 Intel StrataFlash Embedded Memory
制造商 Intel Corporation
LOGO Intel Corporation LOGO 


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JS28F256P30T85 数据手册, 描述, 功能
( DataSheet : www.DataSheet4U.com )
Intel StrataFlash® Embedded Memory
(P30)
1-Gbit P30 Family
Datasheet
Product Features
High performance
Security
— 85/88 ns initial access
— One-Time Programmable Registers:
— 40 MHz with zero wait states, 20 ns clock-to-
data output synchronous-burst read mode
• 64 unique factory device identifier bits
• 64 user-programmable OTP bits
— 25 ns asynchronous-page read mode
• Additional 2048 user-programmable OTP bits
— 4-, 8-, 16-, and continuous-word burst mode
— Selectable OTP Space in Main Array:
— Buffered Enhanced Factory Programming
(BEFP) at 5 µs/byte (Typ)
• 4x32KB parameter blocks + 3x128KB main
blocks (top or bottom configuration)
— 1.8 V buffered programming at 7 µs/byte (Typ)
— Absolute write protection: VPP = VSS
Architecture
— Multi-Level Cell Technology: Highest Density
at Lowest Cost
— Power-transition erase/program lockout
— Individual zero-latency block locking
— Individual block lock-down
— Asymmetrically-blocked architecture
Software
— Four 32-KByte parameter blocks: top or
— 20 µs (Typ) program suspend
bottom configuration
— 20 µs (Typ) erase suspend
— 128-KByte main blocks
— Intel® Flash Data Integrator optimized
Voltage and Power
— VCC (core) voltage: 1.7 V – 2.0 V
— VCCQ (I/O) voltage: 1.7 V – 3.6 V
— Standby current: 55 µA (Typ) for 256-Mbit
— Basic Command Set and Extended Command
Set compatible
— Common Flash Interface capable
Density and Packaging
— 4-Word synchronous read current:
13 mA (Typ) at 40 MHz
— 64/128/256-Mbit densities in 56-Lead TSOP
package
Quality and Reliability
— Operating temperature: –40 °C to +85 °C
— 64/128/256/512-Mbit densities in 64-Ball
Intel® Easy BGA package
• 1-Gbit in SCSP is –30 °C to +85 °C
— 64/128/256/512-Mbit and 1-Gbit densities in
— Minimum 100,000 erase cycles per block
Intel® QUAD+ SCSP
— ETOX™ VIII process technology (130 nm)
— 16-bit wide data bus
The Intel StrataFlash® Embedded Memory (P30) product is the latest generation of Intel
StrataFlash® memory devices. Offered in 64-Mbit up through 1-Gbit densities, the P30 device
brings reliable, two-bit-per-cell storage technology to the embedded flash market segment.
Benefits include more density in less space, high-speed interface, lowest cost-per-bit NOR
device, and support for code and data storage. Features include high-performance synchronous-
burst read mode, fast asynchronous access times, low power, flexible security options, and three
industry standard package choices.
The P30 product family is manufactured using Intel® 130 nm ETOX™ VIII process technology.
www.DataSheet4U.com
Order Number: 306666, Revision: 001
April 2005







JS28F256P30T85 pdf, 数据表
1-Gbit P30 Family
RFU :
SR :
WSM :
Reserved for Future Use
Status Register
Write State Machine
1.3 Conventions
VCC :
VCC :
0x :
0b :
SR[4] :
A[15:0] :
A5 :
Bit :
Byte :
Word :
Kbit :
KByte :
KWord :
Mbit :
MByte :
MWord :
Signal or voltage connection
Signal or voltage level
Hexadecimal number prefix
Binary number prefix
Denotes an individual register bit.
Denotes a group of similarly named signals, such as address
or data bus.
Denotes one element of a signal group membership, such as
an individual address bit.
Binary unit
Eight bits
Two bytes, or sixteen bits
1024 bits
1024 bytes
1024 words
1,048,576 bits
1,048,576 bytes
1,048,576 words
April 2005
8
Intel StrataFlash® Embedded Memory (P30)
Order Number: 306666, Revision: 001
Datasheet







JS28F256P30T85 equivalent, schematic
1-Gbit P30 Family
Figure 6. 1-Gbit, 88-ball (80 active) QUAD+ SCSP Specifications (11x11x1.4 mm)
A1 Index
Mark
12345678
A
B
C
D
E
F
G
H
J
K
L
M
E
A
B
C
D
E
DF
G
H
J
K
L
M
S1
8 7 6 5 4 3 21
S2
e
b
Top View - Ball Down
A2
A1
Bottom View - Ball Up
A
Y
Drawing not to scale.
Dimens ions
Packag e Height
Ball Height
Packag e Body Thicknes s
Ball (Lead) W idth
Packag e Body Length
Packag e Body W idth
Pitch
Ball (Lead) Count
Seating Plane Coplanarity
Corner to Ball A 1 Dis tance A lon g E
Corner to Ball A 1 Dis tance A lon g D
S ymbol
A
A1
A2
b
D
E
e
N
Y
S1
S2
Min
-
0.200
-
0.325
10.900
10.900
-
-
-
2.600
1.000
Millimeters
Nom
Max
- 1.400
--
1.070
-
0.375 0.425
11.000 11.100
11.000 11.100
0.800
-
88 -
- 0.100
2.700 2.800
1.100 1.200
Min
-
0.0079
-
0.0128
0.4291
0.4291
-
-
-
0.1024
0.0394
Inc he s
Nom
-
-
0.0421
0.0148
0.4331
0.4331
0.0315
88
-
0.1063
0.0433
Max
0.0551
-
-
0.0167
0.4370
0.4370
-
-
0.0039
0.1102
0.0472
April 2005
16
Intel StrataFlash® Embedded Memory (P30)
Order Number: 306666, Revision: 001
Datasheet










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