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PDF ( 数据手册 , 数据表 ) NHI-15103ET

零件编号 NHI-15103ET
描述 (NHI Series) Multi-Protocol Data Bus Interface
制造商 National Hybrid
LOGO National Hybrid LOGO 


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NHI-15103ET 数据手册, 描述, 功能
www.DaNtaMSAhuNeTleHtti4IiU-POE.rcTooNmtoEAcnoLhlaDnHachteYadeBBeuTRtse4rIImnUDtien.,rcafIlaosncmec.Bus Controller, Remote Terminal, Bus Monitor
.DUasetra'sSManualVersion 2003.07.14
w July 2003
wThe information provided in this document is believed to be accurate; however, no responsibility is assumed by NATIONAL
HYBRID, INC. for its use, and no license or rights are granted by implication or otherwise in connection therewith. Specifications
mare subject to change without notice.
w .co2200 Smithtown Avenue, Ronkonkoma, NY 11779
t4UTelephone (631) 981- 2400 Data Bus Fax (631) 981- 2445
www.DataSheeWebsite http: //www.nationalhybrid.com







NHI-15103ET pdf, 数据表
3.1.2
Bus Controller Highlights:
Implements all Message Formats and Error Checking
Simple setup and operation. Preset multiple pointer tables and message blocks. Only two Frame
Pointer and Frame Length Registers are required to control unlimited number of message
blocks
BC initialized by writing to three Configuration Registers and the Interrupt Mask Register
Executes lists of messages via Message Frame
Configurable Local Retry and Interrupt Requests Enabled on Message by Message Basis
Configurable Global Retry and Local Retry
Programmable retries per message:
None
Retry Current Bus
Retry Alternate Bus
Retry Alternate Bus then Current Bus.
Programmable response timeout of 14, 18, 26, or 42 microseconds.
Programmable Intermessage Gap Time up to 4 mS with 1 uS resolution.
Extended Intermessage Gap using NO- OP Feature.
Programmable Frame Gap with 64 uS resolution.
Programmable Interrupts for:
End of Message
End of Frame
Response Time Out, Message
Error
Message Retry
RT Status Bit Set
FIFO Overflow.
Non- Maskable Bus Jam Interrupt.
Host controlled commands:
Start BC
Continuous Mode
Stop at End of Message
Stop at End of Frame
Abort,
GOTO Alternate Frame.
Dynamic Bus Switch Upon Successful Retry.
3.1.3
Remote Terminal Highlights:
Dynamic Bus Control Acceptance
DBCA_ L bit is set in configuration register.
Message Illegality is internally programmable. DOES NOT require external PROMS or glue
logic.
Employs data tables with individual tag words which indicate whether or not the data is valid,
updated since last read, in the process of being updated, was received via broadcast
command, or has been lost (i. e. updated more than once by a receive message before being
read).
Optionally sets the subsystem flag bit whenever stale data is transmitted or received data is
overwritten.
Issues interrupts on any subset of T/ R bit, subaddresses, mode commands, broadcast
messages and errors.
Provides interrupt priority input and output pins for daisy- chaining interrupt requests.
messages.
Optionally resets the real- time clock in response to a "Synchronize" mode command.
Optionally updates the lower 16 bits of the real- time clock in response to a "Synchronize
WithData" command.
-7 -







NHI-15103ET equivalent, schematic
4.2.0
INTERNAL REGISTERS
4.2.1
CONTROL
Address: 0
This register controls the general operation of the NHi- ET.
15
HWD
7
IRE
14
RSP1
6
MIO
13
RSP0
5
CMDO
12
TSTFST
4
SRQRST
11
NBCST
3
SSF_TF
R/ W BC/ MT/ RT
10
TXINH
2
NTAG
9
LOOPB
1
BINH
8
LOOPA
0
AINH
HWD
Bits: 15
BC/ RT
1 = Enables high word detection.
This option allows extra words in a message to be detected,as required by some protocols.
0= Tterminal does not detect high word errors.
RSP1, RSP0
Bits: 14,13
BC/ RT
These bits define the response timeout for RT- RT messages in the RT mode and terminal
response timeout in the BC mode as follows:
RSP1
0
0
1
1
RSP0
0
1
0
1
TIMEOUT(us)
14
18
26
42
TSTFST
Bits: 12
RT
1= Enables testing of the FAIL SAFE time out.
When this feature is enabled, the RT will transmit continuously once it is enabled by a valid
message. The encoder will be inhibited after 768/ 672us. It will be enabled by a reset or the
reception of another valid message. If this bit is set to 0 during an RT transmission, before
the required number of words have been transmitted, the encoder will return to normal
operation and stop at the proper message length.. If it is set to 0 after the message length
has been exceeded, the current word will be completed and normal operation resumed.
This feature can be used in the LOOPBACK mode to automatically transmit data words.
The RT encoder will remain in the tester mode until the CPU sets this bit to 0.
The TSTFST Bit Must Always Be Set to Zero During Normal Operation!!!
NBCST
Bits: 11
1= Specifies that broadcast commands WILL be ignored by the RT.
RT
TXINH
Bits: 10
BC/ RT
1= Inhibits transmission by forcing TXA= TXAN= 0 and TXB= TXBN= 0.
LOOPA( B)
Bits: 9, 8
RT
1= Defines that decoder A (B) inputs shall be connected internally to the encoder outputs rather
than the transceiver for test purposes.
IRE
Bits: 7
BC/ MT/ RT
1= Globally enables the interrupt request output, *IRQ.
0= Disables all interrupt requests; however, interrupt vectors are still pushed onto the FIFO.
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