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PDF ( 数据手册 , 数据表 ) P8051AH

零件编号 P8051AH
描述 (P80xxAH) MCS51 8-BIT CONTROL-ORIENTED MICROCONTROLLERS
制造商 Intel Corporation
LOGO Intel Corporation LOGO 


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P8051AH 数据手册, 描述, 功能
smu @
MCS@51
8-BIT CONTROL-ORIENTED MICROCONTROLLERS
Commercial/Express
8031AH18051AH18051AHP
8032N+18052N-I
8751W8751H-8
8751BW8752BI-I
s High Performance HMOS Process
s Boolean Processor
s Internal Timers/Event Counters
s Bit-Addressable RAM
s 2-Level interrupt Priority Structure
s 32 1/0 Lines (Four 8-Bit Ports)
s 64K External Program Memory Space
s Security Feature Protects EPROM Parts
Against Software Piracy
s Programmable Full Duplex Serial
Channel
s 111 Instructions (64 Single-Cycle)
s 64K External Data Memory Space
s Extended Temperature Range
(–40”C to +85”C)
The MCS@51 controllers are optimized for control applications. Byte-processing and numerical operations on
small data structures are facilitated by a variety of fast addressing modes for accessing the internal RAM. The
instruction set provides a convenient menu of 8-bit arithmetic instructions, including multiply and divide instruc-
tions. Extensive on-chip support is provided for one-bit variables as a separate data type, allowing direct bit
manipulation and testing in control and logic systems that require Boolean processing.
The 8751H is an EPROM version of the 8051AH. It has 4 Kbytes of electrically programmable ROM which can
be erased with ultraviolet light. His fully compatible with the 8051AH but incorporates one additional feature: a
Program Memory Security bit that can be used to protect the EPROM against unauthorized readout. The
8751 H-8 is identical to the 8751 H but only operates up to 8 MHz.
The 8051AHP is identical to the 8051AH with the exception of the Protection Feature. To incorporate this
Protection Feature, program verification has been disabled and external memory accesses have been limited
to 4K.
The 8052AH is an enhanced version of the 8051AH. It is backwards compatible with the 8051AH and is
fabricated with HMOS II technology. The 8052AH enhancements are listed in the table below. Also refer to this
table for the ROM, ROMless and-EPROM versions of each product.
Device
8031AH
8051AH
6051AHP
8751 H
8751 H-8
6751 BH
8032AH
6052AH
8752BH
Intsrnal Memory
Program
Data
none
4K X 8 ROM
4K X 6 ROM
4K X 8 EPROM
4K X 8 EPROM
4K X 8 EPROM
none
8K X 8 ROM
8K X 8 EPROM
128 X 8 RAM
128 X 8 RAM
128 X 8 RAM
128 X 8 RAM
128 X 6 RAM
128 X 8 RAM
256 X 6 RAM
256 X 8 RAM
256 X 8 RAM
Timera/
Event Counters
2 x 18-Bit
2 x 16-Bit
2 x 16-Bit
2 x 16-Bit
2 x 16-Bit
2 x 16-Bit
3 x 16-Bit
3 x 16-Bit
3 x 16-Bit
Interrupts
5
5
5
5
5
5
6
6
6
I Intel Corporationassumes no responsibilityfor the use of any circuit~ other than circuitryembodied in an Intel product.No other circuitpatent
licenses are implied.Informationcontained herein supersedes previouslypublishedspecificationson theaa davices from Intel.
O INTEL CORPORATION, 1994
October 1994
Order Numben 272318-002







P8051AH pdf, 数据表
MCS” 51 CONTROLLER
DC CHARACTERISTICS (Over Operating Conditions)
All o~ara.m-.e.t.er v.—alu.es a_r rmrl.v ,to.a-ll.devices unless otherwise indicated (Continued)
Symbol
Parameter
Min Max Units
11L2
Logical OInput Current (XTAL2)
–3.2 mA
ILI Input Leakage Current (Porf O)
8751 H and 8751 H-8
All Others
* 1or) pA
t 10 pA
IIH Logical 1 Input Current (~)
8751H and 8751H-8
8751BH/8752BH
500 pA
1 mA
IIH1 Input Current to RST to Activate Reset
500 pA
Icc Power Supply Current:
8031AH/8051 AH/8051AHP
8032AH/8052AH/8751 BH/8752BH
8751H/8751 H-8
125 mA
175 mA
250 mA
Clo Pin Capacitance
10 pF
Teat Conditions
VIN = 0.45V
0.45< VIN < VCC
0.45< VIN < VCC
VIN= 2.4V
4.5V < VIN < 5.5V
VIN < (Vcc – 1.5V)
All Outputs
Disconnected;
m = Vcc
Test freq = 1 MHz
NOTES:
1. Capacitive loading on PortsOand 2 may csuse spurious noise pulses to be superimposed on the VOLS of ALE/PROG
and Ports 1 and 3. The noise is dueto externalbuscapacitancedischarginginto the PortOand Port2 pinswhenthesepins
make 1-to-Otransitionsduringbus operations.In the worst cases(capacitiveloading > 100 pF), the noise pulse on the
ALE/PROGpin mayexceed0.8V.In suchcasesit maybe desirableto qualifyALEwitha SchmittTrigger,or usean address
latchwith a Schmi~TriggerSTROBEinput.
2, ALE/PROGrefersto a pin on the 8751BH.ALErefersto a timingsignalthat is outputon the ALE/PROGpin.
3. Understeadystate(non-transientc)onditions,loL mustbe externallylimitedas follows:
MaximumloL per port pin:
10 mA
MaximumloL per 8-bitpori -
Porto: 26 mA
Ports1, 2, and 3: 15 mA
Maximumtotal toL for all outputpins: 71 mA
If loL exceedsthe test condition,VOLmayexceedthe relatedspecificationP. insare not guaranteedto sinkcurrentgreater
than the listedtest conditions.
8







P8051AH equivalent, schematic
MCS” 51 CONTROLLER
GI-”
”nl r“””
”mrnmrlmn. w I-8. ” ,Lrl..
.“4-s
. m“..
..-.
P1.O-PI.7
P3,0-P3,3
PROGRAMMING
$J
b. “..8.,”
(
VERIFICATION
ADDRESS
PORTO
kLE/PROG
{,
TOVGL —
TAVGL
TSHGL
r
m HIGH
Fi.vPP
DATAIN
\~
——
TGLGH
21V * .5V
—TGHOX
TGHAX
TGHSL
\
TSHSN
P3.7
(ENABLE)
1‘
For programmingconditionssee Figure 5.
TTL HIGH
TTL HIGH
TELOV
\
For verificationconditionssee Figure 6.
272318-14
16










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