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PDF ( 数据手册 , 数据表 ) ST24W08

零件编号 ST24W08
描述 (ST2xxx) 8 Kbit Serial I2C Bus EEPROM with User-Defined Block Write Protection
制造商 ST Microelectronics
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ST24W08 数据手册, 描述, 功能
ST24C08, ST25C08
ST24W08, ST25W08
8 Kbit Serial I2C Bus EEPROM
with User-Defined Block Write Protection
1 MILLION ERASE/WRITE CYCLES with
40 YEARS DATA RETENTION
SINGLE SUPPLY VOLTAGE:
– 3V to 5.5V for ST24x08 versions
– 2.5V to 5.5V for ST25x08 versions
HARDWARE WRITE CONTROL VERSIONS:
ST24W08 and ST25W08
PROGRAMMABLE WRITE PROTECTION
TWO WIRE SERIAL INTERFACE, FULLY I2C
BUS COMPATIBLE
BYTE and MULTIBYTE WRITE (up to 8
BYTES)
PAGE WRITE (up to 16 BYTES)
BYTE, RANDOM and SEQUENTIAL READ
MODES
SELF TIMED PROGRAMMING CYCLE
AUTOMATIC ADDRESS INCREMENTING
ENHANCED ESD/LATCH UP
PERFORMANCES
8
1
PSDIP8 (B)
0.25mm Frame
8
1
SO8 (M)
150mil Width
Figure 1. Logic Diagram
DESCRIPTION
This specification covers a range of 8 Kbits I2C bus
EEPROM products, the ST24/25C08 and the
ST24/25W08. In the text, products are referred to
as ST24/25x08, where "x" is: "C" for Standard
version and "W" for Hardware Write Control ver-
sion.
Table 1. Signal Names
PRE
E
SDA
SCL
MODE
WC
VCC
VSS
Write Protect Enable
Chip Enable Input
Serial Data Address Input/Output
Serial Clock
Multibyte/Page Write Mode
(C version)
Write Control (W version)
Supply Voltage
Ground
VCC
E
PRE
SCL
MODE/WC*
ST24x08
ST25x08
SDA
VSS
AI00860E
Note: WC signal is only available for ST24/25W08 products.
February 1999
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ST24W08 pdf, 数据表
ST24/25C08, ST24/25W08
Figure 6. I2C Bus Protocol
SCL
SDA
START
CONDITION
SDA
SDA
INPUT CHANGE
STOP
CONDITION
SCL
SDA
12
MSB
START
CONDITION
3
SCL
SDA
12
MSB
3
789
ACK
789
ACK
STOP
CONDITION
AI00792
Multibyte Write. For the Multibyte Write mode, the
MODE pin must be at VIH. The Multibyte Write
mode can be started from any address in the
memory. The master sends from one up to 8 bytes
of data, which are each acknowledged by the mem-
ory. The transfer is terminated by the master gen-
erating a STOP condition. The duration of the write
cycle is tW = 10ms maximum except when bytes
are accessed on 2 rows (that is have different
values for the 5 most significant address bits A7-
A3), the programming time is then doubled to a
maximum of 20ms. Writing more than 8 bytes in the
Multibyte Write mode may modify data bytes in an
adjacent row (one row is 16 bytes long). However,
the Multibyte Write can properly write up to 16
consecutive bytes only if the first address of these
16 bytes is the first address of the row, the 15
following bytes being written in the 15 following
bytes of this same row.
Page Write. For the Page Write mode the MODE
pin must be at VIL. The Page Write mode allows up
to 16 bytes to be written in a single write cycle,
provided that they are all located in the same ’row’
in the memory: that is the 4 most significant mem-
ory address bits (A7-A4) are the same inside one
block. The master sends from one up to 16 bytes
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ST24W08 equivalent, schematic
ST24/25C08, ST24/25W08
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
© 1999 STMicroelectronics - All Rights Reserved
All other names are the property of their respective owners
STMicroelectronics GROUP OF COMPANIES
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http://www.st.com
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