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PDF ( 数据手册 , 数据表 ) ST24C01

零件编号 ST24C01
描述 (ST2xxx) SERIAL 1K 128 x 8 EEPROM
制造商 ST Microelectronics
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ST24C01 数据手册, 描述, 功能
ST24/25C01, ST24C01R
ST24/25W01
SERIAL 1K (128 x 8) EEPROM
1 MILLION ERASE/WRITE CYCLES with
40 YEARS DATA RETENTION
SINGLE SUPPLY VOLTAGE:
– 3V to 5.5V for ST24x01 versions
– 2.5V to 5.5V for ST25x01 versions
– 1.8V to 5.5V for ST24C01R version only
HARDWARE WRITE CONTROL VERSIONS:
ST24W01 and ST25W01
TWO WIRE SERIAL INTERFACE, FULLY I2C
BUS COMPATIBLE
BYTE and MULTIBYTE WRITE (up to 4
BYTES)
PAGE WRITE (up to 8 BYTES)
BYTE, RANDOM and SEQUENTIAL READ
MODES
SELF TIMED PROGRAMMING CYCLE
AUTOMATIC ADDRESS INCREMENTING
ENHANCED ESD/LATCH UP
PERFORMANCES
ST24C/W01 are replaced by the M24C01
ST25C/W01 are replaced by the M24C01-W
ST24C01R is replaced by the M24C01-R
DESCRIPTION
This specification covers a range of 1K bits I2C bus
EEPROM products, the ST24/25C01, the
ST24C01R and the ST24/25W01. In the text, prod-
ucts are referred to as ST24/25x01, where "x" is:
"C" for Standard version and "W" for hardware
Write Control version.
Table 1. Signal Names
E0-E2
SDA
SCL
Chip Enable Inputs
Serial Data Address Input/Output
Serial Clock
MODE
WC
Multibyte/Page Write Mode
(C version)
Write Control (W version)
VCC Supply Voltage
VSS Ground
NOT FOR NEW DESIGN
8
1
PSDIP8 (B)
0.25mm Frame
8
1
SO8 (M)
150mil Width
Figure 1. Logic Diagram
VCC
3
E0-E2
SCL
MODE/WC*
ST24x01
ST25x01
ST24C01R
SDA
VSS
AI00839D
Note: WC signal is only available for ST24/25W01 products.
November 1997
This is information on a product still in production but not recommended for new design
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ST24C01 pdf, 数据表
ST24/25C01, ST24C01R, ST24/25W01
Figure 6. I2C Bus Protocol
SCL
SDA
START
CONDITION
SDA
SDA
INPUT CHANGE
STOP
CONDITION
SCL
SDA
12
MSB
START
CONDITION
3
SCL
SDA
12
MSB
3
789
ACK
789
ACK
STOP
CONDITION
AI00792
Write Operations
The Multibyte Write mode (only available on the
ST24/25C01 and the ST24C01R versions) is se-
lected when the MODE pin is at VIH and the Page
Write mode when MODE pin is at VIL. The MODE
pin may be driven dynamically with CMOS input
levels.
Following a START condition the master sends a
device select code with the RW bit reset to ’0’. The
memory acknowledges this and waits for a byte
address. The byte address of 7 bits (the Most
Significant Bit is ignored) provides access to any of
the 128 bytes of the memory. After receipt of the
byte address the device again responds with an
acknowledge.
8/16
For the ST24/25W01 versions, any write command
with WC = 1 (during a period of time from the
START condition untill the end of the Byte Address)
will not modify data and will NOT be acknowledged
on data bytes, as in Figure 9.
Byte Write. In the Byte Write mode the master
sends one data byte, which is acknowledged by the
memory. The master then terminates the transfer
by generating a STOP condition. The Write mode
is independant of the state of the MODE pin which
could be left floating if only this mode was to be
used. However it is not a recommended operating
mode, as this pin has to be connected to either VIH
or VIL, to minimize the stand-by current.







ST24C01 equivalent, schematic
ST24/25C01, ST24C01R, ST24/25W01
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectronics.
© 1997 SGS-THOMSON Microelectronics - All Rights Reserved
Purchase of I2C Components by SGS-THOMSON Microelectronics, conveys a license under the Philips
I2C Patent. Rights to use these components in an I2C system, is granted provided that the system conforms to
the I2C Standard Specifications as defined by Philips.
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -
Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
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