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PDF ( 数据手册 , 数据表 ) W83194BR-B

零件编号 W83194BR-B
描述 Stepless Clock Gen For INTEL Brookdale Chipset
制造商 Winbond
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W83194BR-B 数据手册, 描述, 功能
W83194BR-B
Stepless Clock Gen. For INTEL
Brookdale Chipset
Date: 02/25/2003 Revision: 2.0







W83194BR-B pdf, 数据表
W83194BR-B
STEPLESS CLOCK FOR INTEL BROOKDALE CHIPSET
VTT_PWRGD
26
PD#*
3V66_0
VCH_CLK
31
FS4&
PCICLK_F1^
5
FS0&
PCICLK_F2^
6
FS1&
PCICLK0^
9
ENWD*
10, 11, 12,
15, 16, 17
20, 21, 22
PCICLK [1:6]
3V66_1, 3V66_2,
3V66_3
5.3 I2C Control Interface
IN
IN
OUT
OUT
Power good input signal comes from ACPI with high active. This
3.3V input is level sensitive strobe used to determine FS [4:0] and
MULTISEL0 input are valid and is ready to sample. This pin is high
active.
Power Down Function. This is internal 120K pull up. This is multi-
function pin. When the VTT_PWRGD signal is asserted (this is,
turns from a logical Low to high), the pin will be switched into the
function of power down (PD#).
66MHz or 48MHz outputs selected by I2C register.
INtd120k Latched input for FS4 at initial power up for H/W selecting the
output frequency of CPU 3V66 and PCI clocks. This is internal 120K
pull down.
OUT 3.3V free running PCI clock during normal operation. This pin is with
x1.5 ~ x2 driving strength.
INtd120k Latched input for FS0 at initial power up for H/W selecting the
output frequency of CPU, 3V66 and PCI clocks. This is internal
120K pull down.
OUT 3.3V free running PCI clock outputs. This pin is with x1.5 ~ x2
driving strength.
INtd120k Latched input for FS1 at initial power up for H/W selecting the
output frequency of CPU, 3V66 and PCI clocks. This is internal
120K pull down.
OUT 3.3V free running PCI clock outputs. This pin is with x1.5 ~ x2
driving strength.
IN Latched input for ENWD at initial power up for H/W enable the
watch dog timer. This is internal 120K pull up.
OUT Low skew (< 250ps) PCI clock outputs.
OUT 3.3V output clocks for the chipset.
PIN
Pin Name
Type
Description
27
SDATA*
I/OD
Serial data of I2C 2-wire control interface with internal pull-up
resistor.
28
SCLK*
IN Serial clock of I2C 2-wire control interface with internal pull-up
resistor.
Publication Release Date: February 2003
- 4 - Revision 2.0







W83194BR-B equivalent, schematic
W83194BR-B
STEPLESS CLOCK FOR INTEL BROOKDALE CHIPSET
8. ACCESS INTERFACE
The W83194BR-B provides I2C Serial Bus for microprocessor to read/write internal registers. In the
W83194BR-B is provided Block Read/Block Write and Byte-Data Read/Write protocol. The I2C
address is defined at 0xD2.
8.1 Block Write protocol
8.2 Block Read protocol
## In block mode, the command code must filled 8’h00
8.3 Byte Write protocol
8.4 Byte Read protocol
- 12 -
Publication Release Date: February 2003
Revision 2.0










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