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PDF ( 数据手册 , 数据表 ) D80C51

零件编号 D80C51
描述 CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER
制造商 Intel
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D80C51 数据手册, 描述, 功能
87C51 80C51BH 80C31BH
CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER
Commercial Express
87C51 80C51BH 80C51BHP 80C31BH
See Table 1 for Proliferation Options
Y High Performance CHMOS EPROM
Y 24 MHz Operation
Y Improved Quick-Pulse Programming
Algorithm
Y 3-Level Program Memory Lock
Y Boolean Processor
Y 128-Byte Data RAM
Y 32 Programmable I O Lines
Y Two 16-Bit Timer Counters
Y Extended Temperature Range
(b40 C to a85 C)
Y 5 Interrupt Sources
Y Programmable Serial Port
Y TTL- and CMOS-Compatible Logic
Levels
Y 64K External Program Memory Space
Y 64K External Data Memory Space
Y ONCE Mode Facilitates System Testing
Y Power Control Modes
Idle
Power Down
MEMORY ORGANIZATION
PROGRAM MEMORY Up to 4 Kbytes of the program memory can reside on-chip (except 80C31BH) In
addition the device can address up to 64K of program memory external to the chip
DATA MEMORY This microcontroller has a 128 x 8 on-chip RAM In addition it can address up to 64 Kbytes of
external data memory
The Intel 87C51 80C51BH 80C31BH is a single-chip control-oriented microcontroller which is fabricated on
Intel’s reliable CHMOS III-E technology Being a member of the MCS 51 controller family the
87C51 80C51BH 80C31BH uses the same powerful instruction set has the same architecture and is pin-for-
pin compatible with the existing MCS 51 controller family of products
The 80C51BHP is identical to the 80C51BH When ordering the 80C51BHP customers must submit the 64
byte encryption table together with the ROM code Lock bit 1 will be set to enable the internal ROM code
protection and at the same time allows code verification
The extremely low operating power along with the two reduced power modes Idle and Power Down make
this part very suitable for low power applications The Idle mode freezes the CPU while allowing the RAM
timer counters serial port and interrupt system to continue functioning The Power Down mode saves the
RAM contents but freezes the oscillator causing all other chip functions to be inoperative
For the remainder of this document the 87C51 80C51BH and 80C31BH will be referred to as the 87C51 BH
unless information applies to a specific device
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT INTEL CORPORATION 1995
October 1995
Order Number 272335-003







D80C51 pdf, 数据表
87C51 80C51BH 80C31BH
ABSOLUTE MAXIMUM RATINGS
Ambient Temperature Under Bias b40 C to a85 C
Storage Temperature
b65 C to a150 C
Voltage on EA VPP Pin to VSS
Voltage on Any Other Pin to VSS
Maximum IOL per I O Pin
Power Dissipation
0V to a13 0V
b0 5V to a6 5V
15 mA
1 5W
(Based on package heat transfer limitations not de-
vice power consumption )
NOTICE This data sheet contains preliminary infor-
mation on new products in production It is valid for
the devices indicated in the revision history The
specifications are subject to change without notice
WARNING Stressing the device beyond the ‘‘Absolute
Maximum Ratings’’ may cause permanent damage
These are stress ratings only Operation beyond the
‘‘Operating Conditions’’ is not recommended and ex-
tended exposure beyond the ‘‘Operating Conditions’’
may affect device reliability
OPERATING CONDITIONS
Symbol
Description
TA Ambient Temperature Under Bias
Commercial
Express
VCC
fOSC
Supply Voltage
Oscillator Frequency
87C51 BH
87C51-1 BH-1
87C51-2 BH-2
87C51-24 BH-24
Min
0
b40
45
35
35
05
35
Max
a70
a85
55
12
16
12
24
Unit
C
C
V
MHz
DC CHARACTERISTICS (Over Operating Conditions)
All parameter values apply to all devices unless otherwise indicated
Symbol
Parameter
Min Typ(1) Max
VIL
VIL1
VIH
VIH1
VOL
Input Low Voltage
Commercial
Express
Input Low Voltage EA
Commercial
Express
Input High Voltage
(Except XTAL1 RST)
Commercial
Express
Input High Voltage
(XTAL1 RST)
Commercial
Express
Output Low Voltage(6)
(Ports 1 2 3)
b0 5
b0 5
0
b0 5
0 2 VCC a 0 9
0 2 VCC a 1
0 7 VCC
0 7 VCC a 0 1
0 2 VCC b 0 1
0 2 VCC b 0 15
0 2 VCC b 0 3
0 2 VCC b 0 35
VCC a 0 5
VCC a 0 5
VCC a 0 5
VCC a 0 5
03
0 45
10
Unit
V
V
V
V
V
V
V
V
V
V
V
Test Conditions
IOL e 100 mA(2)
IOL e 1 6 mA(2)
IOL e 3 5 mA(2)
8







D80C51 equivalent, schematic
87C51 80C51BH 80C31BH
SERIAL PORT TIMING SHIFT REGISTER MODE
Symbol
Parameter
12 MHz
Oscillator
24 MHz
Oscillator
Min Max Min Max
TXLXL Serial Port Clock
Cycle Time
10
0 500
TQVXH Output Data Setup 700
to Clock Rising Edge
284
TXHQX
Output Data Hold
After Clock
Rising Edge
87C51 BH
87C51-24 BH-24
50
34
TXHDX Input Data Hold
After Clock
Rising Edge
0
0
TXHDV Clock Rising Edge
to Input Data Valid
700 283
Variable Oscillator
Min
12TCLCL
Max
10TCLCLb133
2TCLCLb117
2TCLCLb34
0
Units
ms
ns
ns
ns
10TCLCLb133 ns
SHIFT REGISTER MODE TIMING WAVEFORMS
AC TESTING INPUT OUTPUT WAVEFORMS
FLOAT WAVEFORMS
272335 – 18
272335 – 19
AC inputs during testing are driven at VCC b 0 5 for a Logic ‘‘1’’
and 0 45V for a Logic ‘‘0 ’’ Timing measurements are made at VIH
min for a Logic ‘‘1’’ and VIL max for a Logic ‘‘0’’
272335 – 20
For timing purposes a port pin is no longer floating when a
100 mV change from load voltage occurs and begins to float
when a 100 mV change from the loaded VOH VOL level occurs
IOL IOH e g20 mA
16










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