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PDF ( 数据手册 , 数据表 ) 84C443

零件编号 84C443
描述 8-bit microcontrollers with OSD and VST
制造商 NXP Semiconductors
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84C443 数据手册, 描述, 功能
INTEGRATED CIRCUITS
DATA SHEET
84C44X; 84C64X; 84C84X
8-bit microcontrollers with
OSD and VST
Product specification
Supersedes data of October 1994
File under Integrated Circuits, IC14
1996 Nov 29







84C443 pdf, 数据表
Philips Semiconductors
8-bit microcontrollers with OSD and VST
Product specification
84C44X; 84C64X; 84C84X
7 RESET
The RESET pin (active LOW input) is used to initialize the
microcontroller to a defined state. The Reset configuration
is shown in Fig.5.
andbook, halfpage
RESET
VDD
R 100 k
C
MCD174 VSS
Fig.4 External components for RESET pin.
7.1 Power-on-reset
The Power-on-reset circuit monitors the voltage level of
VDD. If VDD remains below the internal reference voltage
level Vref (typically 1.3 V), the oscillator is inhibited.
When VDD rises above Vref, the oscillator is released and
the internal reset is active for a period of td (typically
50 µs).
Considering the VDD rise time, the following measures for
a correct Power-on-reset can be taken:
If the VDD rises above the minimum operation voltage
before time period td is exceeded, no external
components are necessary (see Fig.6).
If VDD has a slow rise time, such that after the time
period (tVref + td) has elapsed the supply voltage is still
below the minimum operation voltage (Vmin),
external components are required (see Figs 4 and 7).
To guarantee a correct reset operation, ensure that the
time constant RC 8 × tVDD.
A definite Power-on-reset can be realized by applying an
(external) RESET signal during power-on.
handbook, full pagewidth
oscillator
inhibit
VDD
Vref POWER-ON-RESET
RESET
internal
reset
MLA651
Fig.5 Reset configuration.
VSS
1996 Nov 29
8







84C443 equivalent, schematic
Philips Semiconductors
8-bit microcontrollers with OSD and VST
Product specification
84C44X; 84C64X; 84C84X
11 INPUT/OUTPUT (I/O)
Each parallel I/O port line may be individually configured
using one of three possible I/O mask options.
The three I/O mask options are specified below:
Option 1 Standard port with switched pull-up current
source, Fig.15.
Option 2 Open drain, Fig.16.
Option 3 Push-pull (output only), Fig.17.
Table 5 specifies the possible port option list. When these
devices are used for emulation purposes, in order to match
the piggy back device provided it is recommended that the
port options listed in Table 6 are used.
WRITE PULSE
handbook, full pOagUeTwLid/tOh RL/ANL/MOV
DATA BUS
D MQ
MASTER
D SQ
SLAVE
SQ
VDD
TR2 constant
current
TR3 source
100 µA typ.
I/O PORT
LINE
TR1
VSS
ORL/ANL/MOV
IN/MOV
MLA696
Fig.15 Standard output with switched pull-up current source (Option 1).
WRITE PULSE
handbook, full pagewidth OUTL/ORL/ANL
DATA BUS
D MQ
MASTER
D SQ
SLAVE
SQ
VDD
TR1
VSS
ORL/ANL
IN
Fig.16 Open drain type I/O (Option 2).
MLA697
I/O PORT
LINE
1996 Nov 29
16










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