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PDF ( 数据手册 , 数据表 ) M74HCT564

零件编号 M74HCT564
描述 OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HCT564 INVERTING - HCT574 NON INVERTING
制造商 ST Microelectronics
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M74HCT564 数据手册, 描述, 功能
M54/74HCT564
M54/74HCT574
OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT
HCT564 INVERTING - HCT574 NON INVERTING
. HIGH SPEED
fMAX = 62 MHz (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) AT TA = 25 °C
. COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.) VIL = 0.8V (MAX)
. OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
IOL = IOH= 6 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. PIN AND FUNCTION COMPATIBLE
WITH 54/74LS564/574
DESCRIPTION
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HCTXXXF1R M74HCTXXXM1R
M74HCTXXXB1R M74HCTXXXC1R
The M54/74HCT564 and M54HCT574 are high
speed CMOS OCTAL D-TYPE FLIP FLOP WITH 3-
STATE OUTPUTS fabricated in silicon gate C2MOS
technology. They have the same high speed per-
formance of LSTTL combined with true CMOS low
power comsuption. These 8-bit D-type flip-flops are
controlled by a clock input (CK) and an ouput enable
input (OE). On the positive transition of the clock, the
Q outputs will be set to the logic state that were setup
at the D inputs (HCT574) or their complements
(HCT564).
While the OE input is low, the eight outputs will be
in a normal logic state (high or low logic level), and
while high level, the outputs will be in a high imped-
ance state. The output control does not affect the in-
ternal operation of flip-flops. That is, the old data can
be retained or the new data can be entered even
while the outputs are off. The application engineer
has a choice of combination of inverting and non-in-
verting outputs. The 3-state output configuration
and the wide choice of outline make bus-organized
systems simple. All inputs are equipped with protec-
tion circuits against static discharge and transient
excess voltage. This integrated circuit has input and
output characteristics that are fully compatible with
54/74 LSTTL logic families. M54/74HCT devices
are designed to directly interface HSC2MOS sys-
tems with TTL and NMOS components. They are
also plug in replacements for LSTTL devices giving
a reduction of power consumption.
PIN CONNECTION (top view)
HCT564
HCT574
HCT564
HCT574
September 1993
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M74HCT564 pdf, 数据表
M54/M74HCT564/574
TEST CIRCUIT ICC (Opr.)
INPUT WAVEFORM IS THE SAME AS THAT IN CASE OF SWITCHING CHARACTERISTICS TEST.
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