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PDF ( 数据手册 , 数据表 ) M74HC259

零件编号 M74HC259
描述 8 BIT ADDRESSABLE LATCH
制造商 ST Microelectronics
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M74HC259 数据手册, 描述, 功能
M54HC259
M74HC259
. HIGH SPEED
tPD = 15 ns (TYP.) at VCC = 5 V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) at TA = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL PROPAGATION DELAYS
IOH= IOL = 4 mA (MIN.)
. BALANCED PRORAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V to 6 V
. PIN AND FUNCTION COMPATIBLE WITH
54/74LS259
DESCRIPTION
The M54/74HC259 is a high speed CMOS 8 BIT
ADDRESSABLE LATCH fabricated in silicon gate
C2MOS technology. It has the same high speed per-
formance of LSTTL combined with true CMOS low
power consumption.
The M54HC259/M74HC259 has single data input
(D) 8 latch outputs (Q0-Q7), 3 address inputs (A, B,
and C), common enable input (E), and a common
CLEAR input. To operate this device as an address-
able latch, data is held on the D input, and the ad-
dress of the latch into which the data is to be entered
is held on the A, B, and C inputs. When ENABLE is
taken low the data flows through to the addresses
output. The data is stored on the positive-going
edge of the ENABLE pulse. All unaddressed latches
will remain unaffected. With ENABLE in the high
state the device is deselected and all latches remain
in their previous state, unaffected by changes on the
data or address inputs. To eliminate the possibility
of entering erroneous data into the latches, the EN-
ABLE should be held high (inactive) while the ad-
dress lines are changing. If ENABLE is held high and
CLEAR is taken low all eight latches are cleared to
the low state. If ENABLE is low all latches except the
addressed latch will be cleared. The addressed
latch will instead follow the D input, effectively imple-
menting a 3-to 8 line decoder.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
October 1992
8 BIT ADDRESSABLE LATCH
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M 54HC 25 9F 1R
M 74H C2 59 M1 R
M 74HC 25 9B 1R
M 74H C2 59 C1 R
PIN CONNECTIONS (top view)
NC =
No Internal
Connection
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M74HC259 pdf, 数据表
M54/M74HC259
DIM.
a1
B
b
b1
D
E
e
e3
F
I
L
Z
Plastic DIP16 (0.25) MECHANICAL DATA
MIN.
0.51
0.77
mm
TYP.
0.5
0.25
8.5
2.54
17.78
3.3
MAX.
1.65
20
7.1
5.1
1.27
MIN.
0.020
0.030
inch
TYP.
0.020
0.010
0.335
0.100
0.700
0.130
MAX.
0.065
0.787
0.280
0.201
0.050
P001C
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