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PDF ( 数据手册 , 数据表 ) 74VHCT08AN

零件编号 74VHCT08AN
描述 Quad 2-Input AND Gate
制造商 Fairchild Semiconductor
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74VHCT08AN 数据手册, 描述, 功能
July 1997
Revised March 1999
74VHCT08A
Quad 2-Input AND Gate
General Description
The VHCT08A is an advanced high speed CMOS 2 Input
AND Gate fabricated with silicon gate CMOS technology. It
achieves the high-speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation.
The internal circuit is composed of 4 stages including buffer
output, which provide high noise immunity and stable out-
put.
Protection circuits ensure that 0V to 7V can be applied to
the input pins without regard to the supply voltage and to
the output pins with VCC = 0V. These circuits prevent
device destruction due to mismatched supply and input/
output voltages. This device can be used to interface 3V to
5V systems and two supply systems such as battery
backup.
Features
s High speed: tPD = 5.0 ns (typ) at TA = 25°C
s High noise immunity: VIH = 2.0V, VIL = 0.8V
s Power down protection is provided on all inputs and
outputs
s Low noise: VOLP = 0.8V (max)
s Low power dissipation:
ICC = 2 µA (max) @ TA = 25°C
s Pin and function compatible with 74HCT08
Ordering Code:
Order Number Package Number
Package Description
74VHCT08AM
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74VHCT08ASJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHCT08AMTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHCT08AN
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
An, Bn
On
Description
Inputs
Outputs
Truth Table
A
L
L
H
H
B
L
H
L
H
O
L
L
L
H
© 1999 Fairchild Semiconductor Corporation DS500025.prf
www.fairchildsemi.com












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