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PDF ( 数据手册 , 数据表 ) M40Z300WMH1TR

零件编号 M40Z300WMH1TR
描述 NVRAM CONTROLLER for up to EIGHT LPSRAM
制造商 ST Microelectronics
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M40Z300WMH1TR 数据手册, 描述, 功能
M40Z300
M40Z300W
NVRAM CONTROLLER for up to EIGHT LPSRAM
s CONVERT LOW POWER SRAMs into
NVRAMs
s PRECISION POWER MONITORING and
POWER SWITCHING CIRCUITRY
s AUTOMATIC WRITE-PROTECTION when VCC
is OUT-OF-TOLERANCE
s TWO INPUT DECODER ALLOWS CONTROL
for up to 8 SRAMs (with 2 devices active in
parallel)
s CHOICE of SUPPLY VOLTAGES and
POWER-FAIL DESELECT VOLTAGES:
– M40Z300:
VCC = 4.5V to 5.5V
THS = VSS 4.5V VPFD 4.75V
THS = VOUT 4.2V VPFD 4.5V
– M40Z300W:
VCC = 3.0V to 3.6V
THS = VSS 2.8V VPFD 3.0V
VCC = 2.7V to 3.3V
THS = VOUT 2.5 VPFD 2.7V
s RESET OUTPUT (RST) for POWER ON
RESET
s LESS THAN 12ns CHIP ENABLE ACCESS
PROPAGATION DELAY (for 5.0V device)
s PACKAGING INCLUDES a 28-LEAD SOIC
and SNAPHAT® TOP, or a 16-LEAD SOIC
(to be Ordered Separately)
s SOIC PACKAGE PROVIDES DIRECT
CONNECTION for a SNAPHAT TOP which
CONTAINS the BATTERY
s BATTERY LOW PIN (BL)
DESCRIPTION
The M40Z300/W NVRAM Controller is a self-con-
tained device which converts a standard low-pow-
er SRAM into a non-volatile memory. A precision
voltage reference and comparator monitors the
VCC input for an out-of-tolerance condition.
SNAPHAT (SH)
Battery
28
1
SOH28 (MH)
16
1
SO16 (MQ)
Figure 1. Logic Diagram
VCC B+(1)
THS
E
B
A
M40Z300
M40Z300W
VOUT
BL
E1CON
E2CON
E3CON
E4CON
RST
VSS B–(1)
NOTE: 1. For 16-pin SOIC package only.
AI02242
March 2000
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M40Z300WMH1TR pdf, 数据表
M40Z300, M40Z300W
Table 7. Power Down/Up AC Characteristics
(TA = 0 to 70°C)
Symbol
Parameter
Min
Max
Unit
tF (1)
VPFD (max) to VPFD (min) VCC Fall Time
300 µs
tFB (2)
VPFD (min) to VSS VCC Fall Time
150 µs
tR VPFD(min) to VPFD (max) VCC Rise Time
10 µs
tEDL Chip Enable Propagation Delay Low
M40Z300
M40Z300W
12 ns
20 ns
tEDH
Chip Enable Propagation Delay High
M40Z300
M40Z300W
10 ns
20 ns
tAS A, B set up to E
0 ns
tCER
Chip Enable Recovery
40 120 ms
tREC
VPFD (max) to RST High
40 120 ms
tWPT
Write Protect Time
M40Z300
40 150 µs
M40Z300W 40 250 µs
tRB VSS to VPFD (min) VCC Rise Time
1 µs
Note: 1. VPFD (max) to VPFD (min) fall time of less than tF may result in deselection/write protection not occurring until 200 µs after
VCC passes VPFD (min)..
2. VPFD (min) to VSS fall time of less than tFB may cause corruption of RAM data.
BATTERY LOW PIN
The M40Z300/W automatically performs battery
voltage monitoring upon power-up, and at factory-
programmed time intervals of at least 24 hours.
The Battery Low (BL) pin will be asserted if the
battery voltage is found to be less than approxi-
mately 2.5V. The BL pin will remain asserted until
completion of battery replacement and subse-
quent battery low monitoring tests, either during
the next power-up sequence or the next scheduled
24-hour interval.
If a battery low is generated during a power-up se-
quence, this indicates that the battery is below
2.5V and may not be able to maintain data integrity
in the SRAM. Data should be considered suspect,
and verified as correct. A fresh battery should be
installed.
If a battery low indication is generated during the
24-hour interval check, this indicates that the bat-
tery is near end of life. However, data is not com-
promised due to the fact that a nominal VCC is
supplied. In order to insure data integrity during
subsequent periods of battery back-up mode, the
battery should be replaced. SNAPHAT top should
be replaced with valid VCC applied to the device.
The M40Z300/W only monitors the battery when a
nominal VCC is applied to the device. Thus appli-
cations which require extensive durations in the
battery back-up mode should be powered-up peri-
odically (at least once every few months) in order
for this technique to be beneficial. Additionally, if a
battery low is indicated, data integrity should be
verified upon power-up via a checksum or other
technique. The BL pin is an open drain output and
an appropriate pull-up resistor to VCC should be
chosen to control the rise time.
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M40Z300WMH1TR equivalent, schematic
M40Z300, M40Z300W
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is registered trademark of STMicroelectronics
® 2000 STMicroelectronics - All Rights Reserved
All other names are the property of their respective owners.
STMicroelectronics GROUP OF COMPANIES
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