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PDF ( 数据手册 , 数据表 ) ZN449D

零件编号 ZN449D
描述 8-BIT MICROPROCESSOR COMPATIBLE A-D CONVERTER
制造商 ETC
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ZN449D 数据手册, 描述, 功能
ZN448/ZN449
8-BIT MICROPROCESSOR COMPATIBLE A-D CONVERTER
DS3013 - 2.2
The ZN448 and ZN449 are 8-bit successive
approximation A-D converters designed to be easily
interfaced to microprocessors. All active circuitry is contained
on-chip including a clock generator and stable 2.5V bandgap
reference, control logic and double buffered latches with
reference.
Only a reference resistor and capacitor, clock resistor and
capacitor and input resistors are required for operation with
either unipolar or bipolar input voltage.
FEATURES
s Easy Interfacing to Microprocessor, or operates as a
'Stand-Alone' Converter
s Fast: 9 microseconds Conversion time Guaranteed
s Choice of Linearity: 0.5 LSB - ZN448, 1 LSB - ZN449
s On-Chip Clock
s Choice of On-Chip or External Reference Voltage
s Unipolar or Bipolar Input Ranges
s Commercial Temperature Range
ORDERING INFORMATION
Device type
Linearity Operating
error (LSB) temperature
ZN448E
0.5 0°C to +70°C
ZN449D
1 0°C to +70°C
ZN449E
1 0°C to +70°C
Package
DP18
MP18
DP18
BUSY (END OF CONVERSION) 1
RD (OUTPUT ENABLE) 2
CLOCK 3
WR (START CONVERSION) 4
REXT 5
VIN
VREF IN
6
7
VREF OUT 8
GROUND 9
18 DB0 (LSB)
17 DB1
16 DB2
15 DB3
14 DB4
13 DB5
12 DB6
11 DB7 (MSB)
10 +VCC (+5V)
ZN448/9E (DP18)
BUSY (END OF CONVERSION)
RD (OUTPUT ENABLE)
CLOCK
WR (START CONVERSION)
REXT
VIN
VREF IN
VREF OUT
GROUND
1
2
3
4
5
6
7
8
9
ZN449D (MP18)
18
17
16
15
14
13
12
11
10
Fig.1 Pin connection - top view
DB0 (LSB)
DB1
DB2
DB3
DB4
DB5
DB6
DB7 (MSB)
+VCC (+5V)
ANALOGUE
INPUT
VREF IN
6
7
8
VREF OUT
2.5V
REFERENCE
8-BIT DAC
GROUND 9
VCC (+5V) 10
SUCCESSIVE
APPROXIMATION REGISTER
3-STATE BUFFERS
11 12 13 14 15 16 17 18
DB7
DB0
Fig.2 System diagram
COMPARATOR
+
-
5
REXT
CLOCK
GENERATOR
INTERFACE
AND
CONTROL
LOGIC
3 CK RC OR
EXT CLOCK
4
WR
1
BUSY
2
RD







ZN449D pdf, 数据表
ZN448/9
1MHz
100kHz
10kHz
1kHz
10p 100p 1n 10n 100n
Fig.9 Typical clock frequency v CCK (RCK = 0)
ANALOG CIRCUITS
D-A converter
The converter is of the voltage switching type and uses an R-
2R ladder network as shown in Fig.10. Each element is
connected to either 0V or V by transistor voltage switches
REF IN
specially designed for low offset voltage (1mV).
A binary weighted voltage is produced at the output of the R-
2R ladder.
D to A output = n (V -V ) + V
REF IN OS
OS
256
where n is the digital input to the D-A from the successive
approximation register.
V is a small offset voltage that is produced by the device
OS
supply current flowing in the package lead resistance. The
offset will normally be removed by the setting up procedure
and since the offset temperature coefficient is low (8µV/°C)
the effect on accuracy will be neglible.
The D-A output range can be considered to be 0 - V
REF IN
through an output resistance R (4k).
R(4k)
R
R R D TO A OUTPUT
VREF IN
(PIN 7)
0 VOLTS
(PIN 9)
2R 2R 2R
2R 2R
VOS DB0
VOLTAGE
SWITCHES
DB1 DB6
DB7
Fig.10 R-2R ladder network
8







ZN449D equivalent, schematic
ZN448/9
AIN
5k
OFFSET
ADJUST
13k
5k
GAIN
ADJUST
13k
VREF
AIN
7k5
TO PIN 6
± 2% RESISTORS
±20% POTENTIOMETERS
10k
OFFSET
ADJUST
27k
5k
GAIN
ADJUST
8k2
VREF
8k2
TO PIN 6
±5VOLTS FULL SCALE
±10VOLTS FULL SCALE
Fig.19 Bipolar operation component values
Bipolar adjustment prodedure
(i) Apply continuous SC pulses at intervals long enough to
allow a complete conversion and monitor the digital
outputs.
(ii) Apply -(FS -0.5LSB) to AIN and adjust off-set until the bit 8
(LSB) output just flickers between 0 and 1 with all other bits
at 0.
(iii) Apply +(FS -1.5LSB) to AIN and adjust gain until the 8 bit
just flickers between 0 and 1 with all other bits at 1.
(iv) Repeat step (ii).
Bipolar setting up points
Input range, ±FS
-(FS -0.5LSB)
+(FS -1.5LSB)
+5V
+10V
1LSB =2FS
256
-4.9805V
-9.9609V
Bipolar logic coding
Analogue input (A )
IN
(Nominal code centre value)
+4.9414V
+9.8828V
Output code
(offset binary)
+(FS - 1LSB)
+(FS - 2LSB)
+0.5FS
+1LSB
0
-1LSB
-0.5FS
-(FS - 1LSB)
-FS
11111111
11111110
11000000
10000001
10000000
01111111
01000000
00000001
00000000
16










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