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PDF ( 数据手册 , 数据表 ) X1228

零件编号 X1228
描述 Real Time Clock/Calendar/CPU Supervisor with EEPROM
制造商 Xicor
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X1228 数据手册, 描述, 功能
New Features
Repetitive Alarms &
Temperature Compensation
4K (512 x 8)
X1228
2-WireRTC
Real Time Clock/Calendar/CPU Supervisor with EEPROM
FEATURES
• Real Time Clock/Calendar
— Tracks time in Hours, Minutes, and Seconds
— Day of the Week, Day, Month, and Year
• 2 Polled Alarms (Non-volatile)
— Settable on the Second, Minute, Hour, Day of the
Week, Day, or Month
— Repeat Mode (periodic interrupts)
• Oscillator Compensation on chip
— Internal feedback resistor and compensation
capacitors
— 64 position Digitally Controlled Trim Capacitor
— 6 digital frequency adjustment settings to
±30ppm
• CPU Supervisor Functions
— Power On Reset, Low Voltage Sense
— Watchdog Timer (SW Selectable: 0.25s, 0.75s,
1.75s, off)
• Battery Switch or Super Cap Input
• 512 x 8 Bits of EEPROM
— 64-Byte Page Write Mode
— 8 modes of Block Lock™ Protection
— Single Byte Write Capability
• High Reliability
— Data Retention: 100 years
— Endurance: 100,000 cycles per byte
• 2-Wire™ Interface interoperable with I2C*
— 400kHz data transfer rate
• Frequency Output (SW Selectable: Off, 1Hz,
4096Hz, or 32.768kHz)
• Low Power CMOS
— 1.25µA Operating Current (Typical)
• Small Package Options
— 14-Lead SOIC and 14-Lead TSSOP
APPLICATIONS
• Utility Meters
• HVAC Equipment
• Audio / Video Components
• Set Top Box / Television
• Modems
• Network Routers, Hubs, Switches, Bridges
• Cellular Infrastructure Equipment
• Fixed Broadband Wireless Equipment
• Pagers / PDA
• POS Equipment
• Test Meters / Fixtures
• Office Automation (Copiers, Fax)
• Home Appliances
• Computer Products
• Other Industrial / Medical / Automotive
BLOCK DIAGRAM
32.768kHz
X1
X2
PHZ/IRQ
Select
SCL
SDA
Serial
Interface
Decoder
RESET
Control
Decode
Logic
8
OSC Compensation
Oscillator
Frequency 1Hz
Divider
Timer
Calendar
Logic
Time
Keeping
Registers
(SRAM)
Control/
Registers
(EEPROM)
Status
Registers
(SRAM)
Alarm
Watchdog
Timer
Low Voltage
Reset
Compare
Alarm Regs
(EEPROM)
4K
EEPROM
ARRAY
Battery
Switch
Circuitry
VCC
VBACK
*I2C is a Trademark of Philips.
REV 1.3 3/24/04
www.xicor.com
Characteristics subject to change without notice. 1 of 31







X1228 pdf, 数据表
X1228
VTRIP Programming Timing Diagram
VCC
(VTRIP)
VTRIP
tTSU
tTHD
RESET
VCC
SCL
SDA
tVPS
0 123456 7
VP = 15V
01 234567 0 123456 7
tVPH
01234 567
tVPO
VCC
tRP
AEh
00h 03h/01h
00h
VTRIP Programming Parameters
Parameter
Description
tVPS
tVPH
tTSU
tTHD
tVPO
VTRIP Program Enable Voltage Setup time
VTRIP Program Enable Voltage Hold time
VTRIP Setup time
VTRIP Hold (stable) time
VTRIP Program Enable Voltage Off time
(Between successive adjustments)
tRP
VTRIP Program Recovery Period
(Between successive adjustments)
VP
VTRAN
Vtv
Programming Voltage
VTRIP Programmed Voltage Range
VTRIP Program variation after programming
(Programmed at 25°C)
VTRIP programming parameters are not 100% Tested.
Min.
1
1
1
10
0
10
14
1.7
-25
Max.
16
5.0
+25
Units
µs
µs
µs
ms
µs
ms
V
V
mV
REV 1.3 3/24/04
www.xicor.com
Characteristics subject to change without notice. 8 of 31







X1228 equivalent, schematic
X1228
LOW VOLTAGE RESET OPERATION
When a power failure occurs, and the voltage to the
part drops below a fixed vTRIP voltage, a reset pulse is
issued to the host microcontroller. The circuitry moni-
tors the VCC line with a voltage comparator which
senses a preset threshold voltage. Power up and
power down waveforms are shown in Figure 4. The
Low Voltage Reset circuit is to be designed so the
RESET signal is valid down to 1.0V.
When the low voltage reset signal is active, the operation
of any in progress nonvolatile write cycle is unaffected,
allowing a nonvolatile write to continue as long as possi-
ble (down to the power on reset voltage). The low voltage
reset signal, when active, terminates in progress commu-
nications to the device and prevents new commands, to
reduce the likelihood of data corruption.
Figure 3. Watchdog Restart/Time Out
tRSP
tRSP<tWDO
tRSP>tWDO
tRST
tRSP>tWDO
tRST
SCL
SDA
RESET
Start
Stop Start
Note: All inputs are ignored during the active reset period (tRST).
Figure 4. Power On Reset and Low Voltage Reset
VTRIP
VCC
tPURST
RESET
tR
tRPD
tPURST
tF
VRVALID
VCC THRESHOLD RESET PROCEDURE
[OPTIONAL]
The X1228 is shipped with a standard VCC threshold
(VTRIP) voltage. This value will not change over normal
operating and storage conditions. However, in applica-
tions where the standard VTRIP is not exactly right, or if
higher precision is needed in the VTRIP value, the
X1228 threshold may be adjusted. The procedure is
described below, and uses the application of a nonvol-
atile write control signal.
Setting the VTRIP Voltage
It is necessary to reset the trip point before setting the
new value.
To set the new VTRIP voltage, apply the desired VTRIP
threshold voltage to the VCC pin and tie the RESET pin
to the programming voltage VP. Then write data 00h to
address 01h. The stop bit following a valid write opera-
tion initiates the VTRIP programming sequence. Bring
RESET to VCC to complete the operation. Note: this
operation may take up to 10 milliseconds to complete
and also writes 00h to address 01h of the EEPROM
array.
REV 1.3 3/24/04
www.xicor.com
Characteristics subject to change without notice. 16 of 31










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