DataSheet8.cn


PDF ( 数据手册 , 数据表 ) X1227

零件编号 X1227
描述 Real Time Clock/Calendar/CPU Supervisor with EEPROM
制造商 Xicor
LOGO Xicor LOGO 


1 Page

No Preview Available !

X1227 数据手册, 描述, 功能
New Features
Repetitive Alarms &
Temperature Compensation
4K (512 x 8)
X1227
2-WireRTC
Real Time Clock/Calendar/CPU Supervisor with EEPROM
FEATURES
• Real Time Clock/Calendar
— Tracks time in Hours, Minutes, and Seconds
— Day of the Week, Day, Month, and Year
• 2 Polled Alarms (Non-volatile)
— Settable on the Second, Minute, Hour, Day of the
Week, Day, or Month
— Repeat Mode (periodic interrupts)
• Oscillator Compensation on chip
— Internal feedback resistor and compensation
capacitors
— 64 position Digitally Controlled Trim Capacitor
— 6 digital frequency adjustment settings to ±30ppm
• CPU Supervisor Functions
— Power On Reset, Low Voltage Sense
— Watchdog Timer (SW Selectable: 0.25s, 0.75s,
1.75s, off)
• Battery Switch or Super Cap Input
• 4K x 8 Bits of EEPROM
— 64-Byte Page Write Mode
— 8 modes of Block Lock™ Protection
— Single Byte Write Capability
• High Reliability
— Data Retention: 100 years
— Endurance: 100,000 cycles per byte
• 2-Wire™ Interface interoperable with I2C*
— 400kHz data transfer rate
• Low Power CMOS
— 1.25µA Operating Current (Typical)
• Small Package Options
— 8-Lead SOIC and 8-Lead TSSOP
APPLICATIONS
• Utility Meters
• HVAC Equipment
• Audio / Video Components
• Set Top Box / Television
• Modems
• Network Routers, Hubs, Switches, Bridges
• Cellular Infrastructure Equipment
• Fixed Broadband Wireless Equipment
• Pagers / PDA
• POS Equipment
• Test Meters / Fixtures
• Office Automation (Copiers, Fax)
• Home Appliances
• Computer Products
• Other Industrial / Medical / Automotive
DESCRIPTION
The X1227 device is a Real Time Clock with clock/
calendar, two polled alarms with integrated 512x8
EEPROM, oscillator compensation, CPU Supervisor
(POR/LVS and WDT) and battery backup switch.
The oscillator uses an external, low-cost 32.768kHz
crystal. All compensation and trim components are
integrated on the chip. This eliminates several external
discrete components and a trim capacitor, saving
board area and component cost.
BLOCK DIAGRAM
32.768kHz
X1
X2
OSC
Compensation
Oscillator
Frequency 1Hz
Divider
Timer
Calendar
Logic
Time
Keeping
Registers
(SRAM)
Battery
Switch
Circuitry
VCC
VBACK
SCL
SDA
Serial
Interface
Decoder
RESET
Control
Decode
Logic
8
Control/
Registers
(EEPROM)
Status
Registers
(SRAM)
Alarm
Watchdog
Timer
Low Voltage
Reset
Compare
Alarm Regs
(EEPROM)
4K
EEPROM
ARRAY
*I2C is a Trademark of Philips.
REV 1.1.20 1/13/03
www.xicor.com
Characteristics subject to change without notice. 1 of 28







X1227 pdf, 数据表
X1227
POWER ON RESET
Application of power to the X1227 activates a Power
On Reset Circuit that pulls the RESET pin active. This
signal provides several benefits.
– It prevents the system microprocessor from starting
to operate with insufficient voltage.
– It prevents the processor from operating prior to sta-
bilization of the oscillator.
– It allows time for an FPGA to download its configura-
tion prior to initialization of the circuit.
– It prevents communication to the EEPROM, greatly
reducing the likelihood of data corruption on power up.
When VCC exceeds the device VTRIP threshold value
for typically 250ms the circuit releases RESET, allow-
ing the system to begin operation. Recommended slew
rate is between 0.2V/ms and 50V/ms.
WATCHDOG TIMER OPERATION
The watchdog timer is selectable. By writing a value to
WD1 and WD0, the watchdog timer can be set to 3 dif-
ferent time out periods or off. When the Watchdog
timer is set to off, the watchdog circuit is configured for
low power operation.
Watchdog Timer Restart
The Watchdog Timer is started by a falling edge of
SDA when the SCL line is high and followed by a stop
bit. The start signal restarts the watchdog timer
counter, resetting the period of the counter back to the
maximum. If another start fails to be detected prior to
the watchdog timer expiration, then the RESET pin
becomes active. In the event that the start signal
occurs during a reset time out period, the start will
have no effect. When using a single START to refresh
watchdog timer, a STOP bit should be followed to reset
the device back to stand-by mode.
LOW VOLTAGE RESET OPERATION
When a power failure occurs, and the voltage to the
part drops below a fixed vTRIP voltage, a reset pulse is
issued to the host microcontroller. The circuitry moni-
tors the VCC line with a voltage comparator which
senses a preset threshold voltage. Power up and
power down waveforms are shown in Figure 4. The
Low Voltage Reset circuit is to be designed so the
RESET signal is valid down to 1.0V.
When the low voltage reset signal is active, the operation
of any in progress nonvolatile write cycle is unaffected,
allowing a nonvolatile write to continue as long as possi-
ble (down to the power on reset voltage). The low voltage
reset signal, when active, terminates in progress commu-
nications to the device and prevents new commands, to
reduce the likelihood of data corruption.
Figure 3. Watchdog Restart/Time Out
tRSP
tRSP<tWDO
SCL
SDA
tRSP>tWDO
tRST
tRSP>tWDO
tRST
RESET
Start
Stop Start
Note: All inputs are ignored during the active reset period (tRST).
REV 1.1.20 1/13/03
www.xicor.com
Characteristics subject to change without notice. 8 of 28







X1227 equivalent, schematic
X1227
ABSOLUTE MAXIMUM RATINGS
Temperature Under Bias ................... -65°C to +135°C
Storage Temperature......................... -65°C to +150°C
Voltage on VCC, VBACK pin
(respect to ground)...............................-0.5V to 7.0V
Voltage on SCL, SDA, X1 and X2
pin (respect to ground) ............... -0.5V to 7.0V or 0.5V
above VCC or VBACK (whichever is higher)
DC Output Current .............................................. 5 mA
Lead Temperature (Soldering, 10 sec) ...............300°C
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and the functional operation
of the device at these or any other conditions above
those indicated in the operational sections of this
specification is not implied. Exposure to absolute max-
imum rating conditions for extended periods may affect
device reliability.
DC OPERATING CHARACTERISTICS (Temperature = -40°C to +85°C, unless otherwise stated.)
Symbol
VCC
VBACK
VCB
VBC
Parameter
Main Power Supply
Backup Power Supply
Switch to Backup Supply
Switch to Main Supply
Conditions Min Typ Max Unit
2.7 5.5 V
1.8 5.5 V
VBACK -0.2
VBACK
VBACK -0.1
VBACK +0.2
V
V
Notes
OPERATING CHARACTERISTICS
Symbol
ICC1
Parameter
Read Active Supply
Current
ICC2
Program Supply Current
(nonvolatile)
ICC3
IBACK
ILI
ILO
Main Timekeeping
Current
Timekeeping Current –
(Low Voltage Sense
and Watchdog Timer
disabled
Input Leakage Current
Output Leakage Current
Conditions
VCC = 2.7V
VCC = 5.0V
VCC = 2.7V
VCC = 5.0V
VCC = 2.7V
VCC = 5.0V
VBACK = 1.8V
VBACK = 3.3V
Min
VIL Input LOW Voltage
-0.5
VIH
VHYS
VOL1
Input HIGH Voltage
Schmitt Trigger Input
Hysteresis
Output LOW Voltage for
SDA and RESET
VCC related level
VCC = 2.7V
VCC = 5.5V
VCC x 0.7 or
VBACK x 0.7
.05 x VCC or
.05 x VBACK
Typ
1.25
1.5
Max
400
800
2.5
3.0
10
20
Unit
µA
µA
mA
mA
µA
µA
µA
µA
Notes
1, 5, 7, 14
2, 5, 7, 14
3, 7, 8, 14, 15
3, 6, 9, 14, 15
“See Perfor-
mance Data”
10
10
VCC x 0.2 or
VBACK x 0.2
VCC + 0.5 or
VBACK + 0.5
µA
µA
V
V
V
10
10
13
13
13
0.4
V
0.4
11
REV 1.1.20 1/13/03
www.xicor.com
Characteristics subject to change without notice. 16 of 28










页数 28 页
下载[ X1227.PDF 数据手册 ]


分享链接

Link :

推荐数据表

零件编号描述制造商
X1226Real Time Clock/Calendar with EEPROMXicor
Xicor
X1226Real Time Clock/CalendarIntersil Corporation
Intersil Corporation
X1227Real Time Clock/Calendar/CPU Supervisor with EEPROMXicor
Xicor
X1227RTC Real TimeClock/Calendar/ CPU SupervisorIntersil Corporation
Intersil Corporation

零件编号描述制造商
STK15C88256-Kbit (32 K x 8) PowerStore nvSRAMCypress Semiconductor
Cypress Semiconductor
NJM4556DUAL HIGH CURRENT OPERATIONAL AMPLIFIERNew Japan Radio
New Japan Radio
EL1118-G5 PIN LONG CREEPAGE SOP PHOTOTRANSISTOR PHOTOCOUPLEREverlight
Everlight


DataSheet8.cn    |   2020   |  联系我们   |   搜索  |  Simemap