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PDF ( 数据手册 , 数据表 ) W6694CD

零件编号 W6694CD
描述 USB Bus ISDN S/T-Controller
制造商 Winbond
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W6694CD 数据手册, 描述, 功能
Preliminary W6694
PASSIVE USB-ISDN S/T-CONTROLLER
W6694
USB Bus ISDN S/T-Controller
Data Sheet
The information described in this document is the exclusive intellectual property of Winbond
Electronics Corp and shall not be reproduced without permission from Winbond.
Winbond is providing this document only for reference purposes for W6694-based system design.
Winbond assumes no responsibility for errors or omissions. All data and specifications are subject to
change without notice.
Publication Release Date: October 2000
- 1 - Revision A1







W6694CD pdf, 数据表
Preliminary W6694
5. SYSTEM DIAGRAM AND APPLICATIONS
Typical applications include:
§ USB passive TA for data only service
§ USB passive TA with one data plus one voice
VDD
D1 R1
1N4148 10K
RESETN
2
RESET1
TR_RST
1
+ C3
1uF
VDD
+ CB1
1uF
CB2
0.1uF
CB3
0.1uF
CB4
0.1uF
CB5
0.1uF
J1
JP1
3.3V
C6
22UF
3.3V
+
VDD
USBDP
USBDN
24MXI
24MXO
GND
SR1
SR2
VDD
SX1
U1
37
38 VDDU
39
40
D+
D-
41
42
43
VDD3
UCLK1
UCLK2
44 VDD3I
45 VSS1
46
47
48
SR1
SR2
VDD1
SX1
USB1
BUS_P
D-
D+
B_GND
1
2
3
4
VDD
USB_P-
USB_P+
GND
USBCONN
ATACH1
SW DPDT
3
1
2
6
4
5
JP2
1
2
3
4
HEADER 4
R4
3.3V
22
R5
1.5K
R6
22
USBDN
USBDP
24
VDD23
VSS23
23
22
TEST2#
TEST1#
EPDO
21
20
19
EPDI 18
EPSK 17
EPCS
PRXD
PTXD
16
15
14
VDD22
VSS22
13
VDD
GND
VDD
VDD
EPDO
EPDI
EPSK
EPCS
VDD
VDD
GND
W6694-QFP48
EPCS
EPSK
EPDO
EPDI
U2
1
2
3
4
CS
SK
DI
DO
VCC
NC
NC
GND
8
7
6
5
NMC9346
DIP8
VDD
GND
24MXI
24MXO
R2
150
768MXI
768MXO
R3
220
C1
10pF
12
Y1
24MHz
1
C2
10pF
2
GND
C4
33pF
12
Y2
7.68MHz
1
C5
33pF
2
GND
D2
LED
D3
LED
D4
LED
D5
LED
D6
LED
D7
LED
D8
LED
D9
LED
R15
560
R16
560
R17
560
R18
560
R19
560
R20
560
R21
560
R22
560
SX1
R7
18
D12
D10
1N4148
SX2
SR1
1N4148
R9
18
R10
1.8K
GND
D16
1N4148
D18
1N4148
SR2
R13
1.8K
D20
1N4148
SX1A
D11
1N4148
D13
D14
D15
VDD
VDD
1N4148
D17
1N4148
1N4148
1N4148
SX2A
R11
D19 8.2K
1N4148
VDD
VDD
SR1A
D21
1N4148
R14
8.2K
SR2A
SX1C
SR1C
SR1A
SX1A
U3
1
2
3
1
2
4
5
6
3
4
5
6
18
18
17
17
16
16
15
14
15
14
13
13
8
98
9
11
11 10
10
UT28615
SX2C
SR2C
SR2A
SX2A
SX1C
FB1
12
FERRI BEAD
JP3
JUMPER
SX2C
R8
100
FB2
FERRI BEAD
12
SR1C
FB3
12
FERRI BEAD
JP4
JUMPER
R12
100
SR2C
1
FB4
2
FERRI BEAD
Fig. 5.1 USB Passive TA Orcad Schematic
ISDN1
1
2
3
4
5
6
7
8
ISDN CONNECTOR
W6694 WITH USB & ISDN INTERFACE
W6694 DEMO BOARD-DATA ONLY
Size
Document Number
15.20X12.00
D:\..\W6694_DEMO\W6694_DEMO.DSN\W6694.SCH
Date:
Monday, May 29, 2000
Sheet
1
of 1
-8-







W6694CD equivalent, schematic
Preliminary W6694
B1_DATA
B1 Channel Data
These are B1 channel data, the length is indicated by B_LEN.
B2_DATA
B2 Channel Data
These are B2 channel data, the length is indicated by B_LEN.
7.1.7 Isochronous-IN Transaction (Endpoint 5)
After power on or reset, all B and D channels receive FIFO (RFIFO) are disabled. A disabled RFIFO
can not receive data from ISDN, and will always return zero-length data for Isochronous-IN
transaction. RFIFO can only be enabled by command CMDR:REN. Once enabled, an Isochronous-
IN transaction can read data from RFIFO of that channel. The data packet also carries XFIFO status
for that channel, and the most recent Isochronous-OUT packet error status (if error ever occurred).
Note that since B1 and B2 channel output length is the same in Isochronous-OUT packet, the XFIFO
status of B1/B2 channels are the same.
The packet format of Isochronous-IN is as below:
Bit 7
ISOE
D_XFR
6
D_XCOL
B1_XFR B1_XDOV
B2_XFR B2_XDOV
543
D_XDOV
B1_XDUN
B2_XDUN
D_XDUN D_RDOV
D_DATA
...
B1_RDOV B1_LEN3
B1_DATA
...
B2_RDOV B2_LEN3
B2_DATA
...
2
D_LEN2
B1_LEN2
B2_LEN2
1
D_LEN1
B1_LEN1
B2_LEN1
0
D_LEN0
B1_LEN0
B2_LEN0
ISOE Isochronous-OUT Error
This bit is set to indicate that the most recent received Isochronous-OUT packet has CRC
error. This bit will remain set, until a CMDR1:CISOE clears it.
XCOL Transmit Collision (D channel only)
This bit indicates a D channel collision on the S-bus has been detected. The data in D
channel XFIFO will be automatically re-transmitted, until the whole HDLC frame are
successfully transmitted. This bit will remain set, until software issue CMDR1:DXEN to clear
this bit.
XFR Transmit FIFO Ready
It is set when XFIFO has at least half of the XFIFO size available for incoming USB data.
XDUN Transmit Data Under-run
The corresponding XFIFO has run out of data. For D and B channel, the XFIFO is reset and
disabled for that channel. This bit is cleared when XFIFO is enabled by XEN bit.
- 16 -










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