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PDF ( 数据手册 , 数据表 ) VT16500ADL

零件编号 VT16500ADL
描述 3.3V 18-bit universal bus transceiver 3-State
制造商 NXP Semiconductors
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VT16500ADL 数据手册, 描述, 功能
INTEGRATED CIRCUITS
74LVT16500A
3.3V 18-bit universal bus transceiver
(3-State)
Product specification
Supersedes data of 1997 Jun 12
IC23 Data Handbook
1998 Feb 19
Philips
Semiconductors







VT16500ADL pdf, 数据表
Philips Semiconductors
3.3V 18-bit universal bus transceiver (3-State)
Product specification
74LVT16500A
AC CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500; Tamb = –40°C to +85°C.
SYMBOL
PARAMETER
WAVEFORM
fMAX
Maximum clock frequency
tPLH Propagation delay
tPHL An to Bn or Bn to An
tPLH Propagation delay
tPHL CPAB to Bn or CPBA to An
tPLH Propagation delay
tPHL LEAB to Bn or LEBA to An
tPZH
tPZL
Output enable time
to High and Low level
tPHZ
tPLZ
Output disable time
from High and Low Level
NOTE:
1. All typical values are at VCC = 3.3V and Tamb = 25°C.
1
2
1
3
5
6
5
6
LIMITS
VCC = 3.3V ±0.3V
MIN
TYP1
MAX
150 350
0.5 1.9 4.2
0.5 1.9 4.2
1.0 3.2 5.4
1.0 3.2 5.4
1.0 2.4 5.4
1.0 2.9 5.4
1.0 2.4 3.9
1.0 2.2 3.9
1.0 2.8 5.2
1.0 3.2 5.2
VCC = 2.7V
MAX
5.4
5.4
6.4
6.4
6.4
6.4
4.6
5.2
5.6
5.6
AC SETUP REQUIREMENTS
GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500; Tamb = –40°C to +85°C.
SYMBOL
PARAMETER
WAVEFORM
ts(H)
ts(L)
th(H)
th(L)
ts(H)
ts(L)
th(H)
th(L)
tw(H)
tw(L)
tw(H)
Setup time, High or Low
An to CPAB or Bn to CPBA
Hold time, High or Low
An to CPAB or Bn to CPBA
Setup time, High or Low
An to LEAB or Bn to CPBA
Hold time, High or Low
An to LEAB or Bn to LEBA
Pulse width, High or Low
CPAB or CPBA
LEAB or LEBA pulse width, High
4
4
4
4
1
3
LIMITS
VCC = 3.3V ±0.3V
MIN TYP
VCC = 2.7V
MIN
1.8 1.0
1.8 0.7
1.5
1.5
00
00
0
0
1.8 1.1
1.8 0.8
1.5
1.5
00
00
0
0
1.2 0.8
1.2 0.8
1.5
1.5
1.2 0.8
1.5
UNIT
MHz
ns
ns
ns
ns
ns
UNIT
ns
ns
ns
ns
ns
ns
1998 Feb 19
8














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