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PDF ( 数据手册 , 数据表 ) TZA1032UK

零件编号 TZA1032UK
描述 Laser driver and controller circuit
制造商 NXP Semiconductors
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TZA1032UK 数据手册, 描述, 功能
INTEGRATED CIRCUITS
DATA SHEET
TZA1032
Laser driver and controller circuit
Preliminary specification
2002 May 06







TZA1032UK pdf, 数据表
Philips Semiconductors
Laser driver and controller circuit
Preliminary specification
TZA1032
SYMBOL
AMEAS
PAD
34
LASP
35
AEZ 37
VDDD2
SCL
SDA
RDWR
ES
ES
FS
38
40
41
42
43
44
45
VDDA3
VSSD2
VSSA3
VDD1
OUT1
46
47
48
49
50
OUT2
51
OUT3
52
Laser driver IC test pads
TEST2
5
TEST1
6
TEST0
7
TYPE
I
O
I
P
I
I/O
O
O
O
I
P
P
P
P
O
O
O
DESCRIPTION
alpha measure; analog current sink input. AMEAS (alpha measure) is the
value of the measured disk writing quality. This is used in the alpha control
loop in order to regulate the actual laser power as a function of non-laser
system and medium drift.
laser power; analog current source output. Pin LASP indicates the laser power
level. The read power is constant and the write power level (which is added
during laser driver write mode) is alpha corrected. This signal is used in order
to normalise signals with respect to laser power.
alpha error zero; digital input with pull-down resistor. Depending on the
programming of an internal mode bit one of two effects occurs when this input
is asserted.
alpha error zero (AEZ): the output of the alpha error adder is forced to zero.
alpha set zero (ASZ): the alpha error adder positive input (i.e. the alpha set
point) is forced to zero.
IC digital power supply
digital input for I2C-clock (the laser driver is a slave device)
digital bi-directional port with open-drain sink output for I2C-bus data
read-write; digital output line. This signal indicates whether the laser driver is
in read mode (HIGH) or write mode (LOW).
analog output line. This signal indicates when valid signals from the
photo-detector can be expected for sampling purposes (used in CD-R
applications).
analog output line. The ES anti-phase signal used together with ES to allow
balanced transmission.
forward sense; analog current sink input. This is the value of the measured
laser power (e.g. measured by a photodiode which receives a set fraction of
laser output directly). This is used in the laser power control loop in order to
regulate the actual laser power to a given set of values as a function of laser
temperature drift.
IC analog power supply
IC digital ground
IC analog ground
laser driver power supply
analog current output to the laser
analog current output to the laser
analog current output to the laser
I digital input bus for test mode control. Normal functional mode (normal
application use) is: all pins with an internal pull-down resistor and code = 0.
I digital input bus for test mode control. Normal functional mode (normal
application use) is: all pins with an internal pull-down resistor and code = 0.
I digital input bus for test mode control. Normal functional mode (normal
application use) is: all pins with an internal pull-down resistor and code = 0.
2002 May 06
8







TZA1032UK equivalent, schematic
Philips Semiconductors
Laser driver and controller circuit
Preliminary specification
TZA1032
9 CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN.
Current driver
VDD[1 to 3]
IOUT[1 to 3]
ROUT[1 to 3]
tr, tf
output supply voltage
output current (threshold)
output current (delta)
output resistance
rise and fall times
depends on package and
load
3.0
1
0
PLL
fo(R) PLL output frequency(1)
fo(W)
PLL output frequency
fi(rlc) PLL input frequency
FS buffer and ADC combination
read mode
write mode
240
320
0
VFS
IFS
N
B3dB
Reg_FS
voltage at pin FS
virtual ground
current at pin FS
DC input current
code 2048
code 2047; nominal gain
resolution
signed
analog bandwidth
programmable gain register 6 bits
1.220
0
3.08
0
Alpha buffer and ADC
Ialpha
Valpha
N
I_alpha
B3dB
Alpha_Reg
input current
into pin AMEAS
input voltage
virtual ground
resolution
signed
DC input current
code 128
code 127; nominal gain
analog bandwidth
programmable gain register 4 bits
0
1.3
520
0
DRX input
IDRXD(HIZ)
DRX data input current
IDRXC(HIZ)
DRX clock input current
VDATA
DRX data input voltage
VCLK
DRX clock input voltage
I2C-bus interface
high-impedance mode
high-impedance mode
low-impedance mode
low-impedance mode
0
0
RON(SDA)
RON(SCL)
on resistance SDA line
on resistance SCL line
100
100
Note
1. Use low range CCO mode only.
TYP.
3.3
120
375
523.2
26.16
1.225
1 000
0
1 000
12
4.06
100
1.4
8
0
100
650
0
0
120
120
150
150
MAX. UNIT
3.6
200
240
1 to 2
V
mA
mA
ns
440 MHz
565 MHz
105 MHz
1.230
4 000
5.64
63
V
µA
µA
µA
bit
kHz
400 µA
1.5 V
bit
− µA
− µA
850 kHz
15
100 µA
100 µA
mV
mV
250
250
2002 May 06
16










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