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PDF ( 数据手册 , 数据表 ) VE28F008

零件编号 VE28F008
描述 8 MBIT (1 MBIT x 8) FLASH MEMORY
制造商 Intel Corporation
LOGO Intel Corporation LOGO 


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VE28F008 数据手册, 描述, 功能
VE28F008
8 MBIT (1 MBIT x 8) FLASH MEMORY
Y High-Density Symmetrically Blocked
Architecture
Sixteen 64 Kbyte Blocks
Y Avionics Temperature Range
b40 C to a125 C
Y Extended Cycling Capability
10K Block Erase Cycles
160K Block Erase
Cycles per Chip
Y Automated Byte Write and Block Erase
Command User Interface
Status Register
Y System Performance Enhancements
RY BY Status Output
Erase Suspend Capability
Y Very High-Performance Read
95 ns Maximum Access Time
Y SRAM-Compatible Write Interface
Y Hardware Data Protection Feature
Erase Write Lockout during Power
Transitions
Y Industry Standard Packaging
40-Lead TSOP
Y ETOXTM III Nonvolatile Flash
Technology
12V Byte Write Block Erase
Y Independent Software Vendor Support
Microsoft Flash File System (FFS)
Intel’s VE28F008 8-Mbit Flash FileTM Memory revolutionizes the design of high performance and durable
mass storage memory systems for the Industrial Avionics and Military markets With its innovative features
like low power blocked architecture high read write performance and expanded temperature range any
design or mission is free from the dependence on battery backed up memory or highly sensitive and slow
rotating media drives
Using the VE28F008 in a PCMCIA 2 1 Flash Memory card ATA drive or any size or shape module will allow
data application or operating systems to be updated or collected anywhere and at anytime This data on
demand feature ensures protection from obsolesce through field or in system software updates
The VE28F008’s highly integrated Command User Interface and Write State Machine decreases the size and
complexity of system software while providing high read write and erase performance The sixteen separately
erasable 64 Kbyte blocks along with a multiple write data protection system provides assurance that highly
important data will be available when needed
The VE28F008 is offered in a 40-lead TSOP (Thin Small Outline Package) which is capable of performing in
temperatures from b40 C to a125 C It employs advanced CMOS circuitry for systems requiring low power
consumption and noise immunity The VE28F008’s 95 ns access time provides superior performance when
compared to magnetic mass storage
Manufactured on Intel’s 0 8 micron ETOXTM III process the VE28F008 provides the highest levels of quality
reliability and cost effectiveness
Microsoft is a trademark of Microsoft Corporation
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT INTEL CORPORATION 1995
May 1994
Order Number 271305-001







VE28F008 pdf, 数据表
VE28F008
Table 3 Command Definitions
Command
Bus
Cycles Notes
First Bus Cycle
Second Bus Cycle
Req’d
Operation Address Data Operation Address Data
Read Array Reset
1 1 Write
X FFH
Intelligent Identifier
3 2 3 4 Write
X 90H Read
IA IID
Read Status Register
2 3 Write
X 70H Read
X SRD
Clear Status Register
1
Write
X 50H
Erase Setup Erase Confirm
2 2 Write BA 20H Write BA D0H
Erase Suspend Erase Resume
2
Write
X B0H Write
X D0H
Byte Write Setup Write
2 2 3 5 Write
WA 40H Write
WA WD
Alternate Byte Write Setup Write 2 2 3 5 Write
WA 10H Write
WA WD
NOTES
1 Bus operations are defined in Table 2
2 IA e Identifier Address 00H for manufacturer code 01H for device code
BA e Address within the block being erased
WA e Address of memory location to be written
3 SRD e Data read from Status Register See Table 4 for a description of the Status Register bits
WD e Data to be written at location WA Data is latched on the rising edge of WE
IID e Data read from intelligent identifiers
4 Following the intelligent identifier command two read operations access manufacture and device codes
5 Either 40H or 10H are recognized by the WSM as the Byte Write Setup command
6 Commands other than those shown above are reserved by Intel for future device implementations and should not be
used
Write
Writes to the Command User Interface enable read-
ing of device data and intelligent identifier They also
control inspection and clearing of the Status Regis-
ter Additionally when VPP e VPPH the Command
User Interface controls block erasure and byte write
The contents of the interface register serve as input
to the internal write state machine
The Command User Interface itself does not occupy
an addressable memory location The interface reg-
ister is a latch used to store the command and ad-
dress and data information needed to execute the
command Erase Setup and Erase Confirm com-
mands require both appropriate command data and
an address within the block to be erased The Byte
Write Setup command requires both appropriate
command data and the address of the location to be
written while the Byte Write command consists of
the data to be written and the address of the loca-
tion to be written
The Command User Interface is written by bringing
WE to a logic-low level (VIL) while CE is low Ad-
dresses and data are latched on the rising edge of
WE Standard microprocessor write timings are
used
Refer to AC Write Characteristics and the AC Wave-
forms for Write Operations Figure 9 for specific tim-
ing parameters
COMMAND DEFINITIONS
When VPPL is applied to the VPP pin read opera-
tions from the Status Register intelligent identifier
or array blocks are enabled Placing VPPH on VPP
enables successful byte write and block erase oper-
ations as well
Device operations are selected by writing specific
commands into the Command User Interface Table
3 defines the VE28F008 commands
Read Array Command
Upon initial device powerup and after exit from deep
powerdown mode the VE28F008 defaults to Read
Array mode This operation is also initiated by writing
FFH into the Command User Interface Microproces-
sor read cycles retrieve array data The device re-
mains enabled for reads until the Command User
Interface contents are altered Once the internal
Write State Machine has started a block erase or
byte write operation the device will not recognize
8







VE28F008 equivalent, schematic
VE28F008
ABSOLUTE MAXIMUM RATINGS
Operating Temperature
Temperature Under Bias
Storage Temperature
Voltage on Any Pin
(except VCC and VPP)
with Respect to GND
VPP Program Voltage with
Respect to GND during
Block Erase Byte Write
VCC Supply Voltage
with Respect to GND
Output Short Circuit Current
b40 C to a125 C
b40 C to a125 C
b65 C to a125 C
b2 0V to a7 0V(1)
b2 0V to a14 0V(1 2)
b2 0V to a7 0V(1)
100 mA(3)
NOTICE This data sheet contains preliminary infor-
mation on new products in production The specifica-
tions are subject to change without notice Verify with
your local Intel Sales office that you have the latest
data sheet before finalizing a design
WARNING Stressing the device beyond the ‘‘Absolute
Maximum Ratings’’ may cause permanent damage
These are stress ratings only Operation beyond the
‘‘Operating Conditions’’ is not recommended and ex-
tended exposure beyond the ‘‘Operating Conditions’’
may affect device reliability
NOTES
1 Minimum DC voltage is b0 5V on input output pins During transitions this level may undershoot to b2 0V for periods
k20 ns Maximum DC voltage on input output pins is VCC a 0 5V which during transitions may overshoot to VCC a 2 0V
for periods k20 ns
2 Maximum DC voltage on VPP may overshoot to a14 0V for periods k20 ns
3 Output shorted for no more than one second No more than one output shorted at a time
OPERATING CONDITIONS
Symbol
Parameter
TC Operating Temperature
VCC VCC Supply Voltage (10%)
Min
b40
4 75
Max
a125
5 25
Unit
C
V
DC CHARACTERISTICS
Symbol
Parameter
ILI Input Load Current
ILO Output Load Current
ICCS
VCC Standby Current
Notes Min
1
Max
g1 0
1 g10
1 3 20
Unit
mA
mA
mA
ICCD
ICCR
VCC Deep Powerdown
Current
VCC Read Current
1
1
See Figure 8
See Figure 9
35 mA
50 mA
Test Conditions
VCC e VCC Max
VIN e VCC or GND
VCC e VCC Max
VOUT e VCC or GND
VCC e VCC Max
CE e RP e VIH
VCC e VCC Max
CE e RP e VCC g0 2V
RP e GND g0 2V
IOUT (RY BY) e 0 mA
VCC e VCC Max CE e GND
f e 8 MHz IOUT e 0 mA
CMOS Inputs
VCC e VCC Max CE e VIL
f e 8 MHz IOUT e 0 mA
TTL Inputs
16










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