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PDF ( 数据手册 , 数据表 ) X84161S8

零件编号 X84161S8
描述 uPort Saver EEPROM
制造商 Xicor
LOGO Xicor LOGO 


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X84161S8 数据手册, 描述, 功能
APPLICATION NOTE
A V A I LABLE
AN95 • AN103 • AN107
16K/64K/128K
X84161/641/129
µPort Saver EEPROM
MPSEEPROM
FEATURES
• Up to 10MHz data transfer rate
• 25ns Read Access Time
• Direct Interface to Microprocessors and
Microcontrollers
—Eliminates I/O port requirements
—No interface glue logic required
—Eliminates need for parallel to serial converters
• Low Power CMOS
—1.8V–3.6V, 2.5V–5.5V and 5V ±10% Versions
—Standby Current Less than 1µA
—Active Current Less than 1mA
• Byte or Page Write Capable
—32-Byte Page Write Mode
• Typical Nonvolatile Write Cycle Time: 2ms
• High Reliability
—100,000 Endurance Cycles
—Guaranteed Data Retention: 100 Years
DESCRIPTION
The µPort Saver memories need no serial ports or spe-
cial hardware and connect to the processor memory bus.
Replacing bytewide data memory, the µPort Saver uses
bytewide memory control functions, takes a fraction of
the board space and consumes much less power.
Replacing serial memories, the µPort Saver provides all
the serial benefits, such as low cost, low power, low volt-
age, and small package size while releasing I/Os for
more important uses.
The µPort Saver memory outputs data within 25ns of an
active read signal. This is less than the read access time
of most hosts and provides “no-wait-state” operation.
This prevents bottlenecks on the bus. With rates to 10
MHz, the µPort Saver supplies data faster than required
by most host read cycle specifications. This eliminates
the need for software NOPs.
The µPort Saver memories communicate over one line of
the data bus using a sequence of standard bus read and
write operations. This “bit serial” interface allows the
µPort Saver to work well in 8-bit, 16 bit, 32-bit, and 64-bit
systems.
A Write Protect (WP) pin prevents inadvertent writes to
the memory.
Xicor EEPROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data reten-
tion is greater than 100 years.
BLOCK DIAGRAM
System Connection
Ports
Saved
µP
µC
DSP
ASIC
RISC
P0/CS
P1/CLK
P2/DI
P3/DO
A15
A0
D7
D0
OE
WE
©Xicor, Inc. 1994, 1997Patents Pending
7008-1.2 8/26/97 T2/C0/D0 SH
Internal Block Diagram
MPS
WP H.V. GENERATION
TIMING & CONTROL
CE
COMMAND
I/O DECODE
OE
AND
CONTROL
LOGIC
WE
X
DEC
EEPROM
ARRAY
16K x 8
8K x 8
2K x 8
Y DECODE
DATA REGISTER
7008 FRM F02.1
1 Characteristics subject to change without notice







X84161S8 pdf, 数据表
X84161/641/129
CAPACITANCE
Symbol
CI/O(2)
CIN(2)
TA = +25°C, f = 1MHz, VCC = 5V
Parameter
Input/Output Capacitance
Input Capacitance
Notes: (2) Periodically sampled, but not 100% tested.
Max.
8
6
Units
pF
pF
Test Conditions
VI/O = 0V
VIN = 0V
7008 FRM T06
POWER-UP TIMING
Symbol
tPUR(3)
tPUW(3)
Parameter
Power-up to Read Operation
Power-up to Write Operation
Max.
2
5
Notes: (3) Time delays required from the time the VCC is stable until the specific operation can be initiated.
Periodically sampled, but not 100% tested.
Units
ms
ms
7008 FRM T07
A.C. CONDITIONS OF TEST
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
VCC x 0.1 to VCC x 0.9
5ns
VCC x 0.5
7008 FRM T08
EQUIVALENT A.C. LOAD CIRCUITS
5V
2.06K
OUTPUT
3.03K
30pF
3V
2.39K
OUTPUT
4.58K
30pF
2V
2.8K
OUTPUT
5.6K
30pF
7008 FRM F06
7008 FRM F07
8







X84161S8 equivalent, schematic
X84161/641/129
PACKAGING INFORMATION
20-LEAD PLASTIC, TSSOP P ACKAGE TYPE V
.025 (.65) BSC
.169 (4.3)
.252 (6.4) BSC
.177 (4.5)
.252 (6.4)
.300 (6.6)
.0075 (.19)
.0118 (.30)
.047 (1.20)
.002 (.05)
.006 (.15)
0° – 8°
.019 (.50)
.029 (.75)
Detail A (20X)
.010 (.25)
Gage Plane
Seating Plane
See Detail “A”
.031 (.80)
.041 (1.05)
NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)
3926 FRM F45
16










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