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PDF ( 数据手册 , 数据表 ) X84041SI

零件编号 X84041SI
描述 Micro Port Saver E2PROM
制造商 Xicor
LOGO Xicor LOGO 


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X84041SI 数据手册, 描述, 功能
APPLICATION NOTES AND DEVELOPMENT SYSTEM
AVA I L A B L E
X84041AN10 • AN17 • AN57 • XK84
4K X84041
Micro Port Saver E2PROM
MPSE2PROM
FEATURES
• Direct Interface to Micros
—Eliminates I/O port requirements
—No interface glue logic required
—Eliminates need for parallel to serial converters
• 3.3Mbps data transfer rate
• Low Power CMOS
—2.7V to 5.5V Operation
—Standby Current Less than 50µA
—Active Current Less than 1mA
• 45ns Read Access Time
• 8-Byte Page Write Mode
• Typical Nonvolatile Write Cycle Time: 5ms
• High Reliability
—100,000 Endurance Cycles
—Guaranteed Data Retention: 100 Years
• 8-Lead PDIP, 8-Lead SOIC, and
14-Lead TSSOP Packages
DESCRIPTION
The X84041 Micro Port Saver is a 4096-bit CMOS
E2PROM designed for a direct interface to port limited
microcontroller or I/O limited microprocessor designs.
The X84041 provides all of the benefits of serial memo-
ries, such as low cost, low power, low voltage operation,
and small package size, while featuring higher data
transfer rates and reduced interface code requirements—
without the need for a dedicated serial bus. The X84041
is organized as a 512 x 8, but is also suitable in 16-bit or
32-bit environments, due to the bit serial nature of the
interface.
The X84041 directly connects to the processor bus and
communicates over a single data line using a sequence
of standard bus read and write operations. This elimi-
nates the need for dedicated port pins, parallel to serial
converters, complicated ASIC implementations, or other
glue logic, lowering system cost.
PIN CONFIGURATION
CE
I/O
WP
VSS
DIP/SOIC
18
27
X84041
36
45
VCC
NC
OE
WE
2704 ILL F01.2
BLOCK DIAGRAM
WP
H.V. GENERATION
TIMING & CONTROL
CE
COMMAND
OE DECODE
AND
WE CONTROL
I/O LOGIC
X
DEC
EEPROM
ARRAY
512 x 8
TSSOP
CE 1
I/O 2
14 VCC
13 NC
NC 3
12 NC
NC 4 X84041 11 NC
NC 5
10 NC
WP 6
9 OE
VSS
7
8 WE
2704 ILL F02a.1
© Xicor, Inc. 1994, 1995, 1996 Patents Pending
2704-4.4 6/12/96 T3/C1/D0 NS
PIN NAMES
I/O Data Input/Output
CE Chip Enable Input
OE Output Enable Input
WE Write Enable Input
WP Write Protect Input
VCC Supply Voltage
VSS Ground
NC No Connect
Y DECODE
DATA REGISTER
2704 ILL F02
2704 PGM T01
1 Characteristics subject to change without notice







X84041SI pdf, 数据表
X84041
Read Cycle
CE
tLOW
tCE
tRC
tHIGH
WE
OE
I/O
tWES
tOE
DATA
tOLZ
tLZ
tOH
tWEH
tOHZ
HIGH Z
tHZ 2704 ILL F06
Write Cycle Limits – X84041
Symbol Parameter
VCC = 5V ±10%
Min.
Max.
VCC = 3V ±10%
Min. Max.
tNVWC(5) Nonvolatile Write Cycle Time
10 10
tWC
tWP
tWPH
Write Cycle Time
WE Pulse Width
WE HIGH Recovery Time
300
30
200
300
30
200
tCS Write Setup Time
00
tCH
tCP
tCPH
tOES
tOEH
Write Hold Time
CE Pulse Width
CE HIGH Recovery Time
OE HIGH Setup Time
OE HIGH Hold Time
0
30
200
50
50
0
30
200
50
50
tDS(6)
Data Setup Time
30 30
tDH(6)
tWPCS(7)
tWPCH(7)
tWPWS(7)
tWPWH(7)
Data Hold Time
WP HIGH Before CE
WP HIGH After CE
WP HIGH Before WE
WP HIGH After WE
5
500
500
500
500
5
500
500
500
500
Notes: (5) tNVWC is the time from the falling edge of OE or CE (whichever occurs last) of the second read cycle in the
“start nonvolatile write cycle” sequence until the self-timed, internal nonvolatile write cycle is completed.
(6) Data is latched into the X84041 on the rising edge of CE or WE, whichever occurs first.
(7) Periodically sampled, but not 100% tested.
Units
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2704 PGM T10.3
8














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