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PDF ( 数据手册 , 数据表 ) XC17128EVO8I

零件编号 XC17128EVO8I
描述 Configuration PROMs
制造商 Xilinx
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XC17128EVO8I 数据手册, 描述, 功能
0
R XC1700E and XC1700L Series
Configuration PROMs
DS027 (v3.1) July 5, 2000
08
Features
• One-time programmable (OTP) read-only memory
designed to store configuration bitstreams of Xilinx
FPGA devices
• Simple interface to the FPGA; requires only one user
I/O pin
• Cascadable for storing longer or multiple bitstreams
• Programmable reset polarity (active High or active
Low) for compatibility with different FPGA solutions
• XC17128E/EL, XC17256E/EL, XC1701 and XC1700L
series support fast configuration
• Low-power CMOS Floating Gate process
• XC1700E series are available in 5V and 3.3V versions
• XC1700L series are available in 3.3V only
• Available in compact plastic packages: 8-pin SOIC,
8-pin VOIC, 8-pin PDIP, 20-pin SOIC, 20-pin PLCC,
44-pin PLCC or 44-pin VQFP.
• Programming support by leading programmer
manufacturers.
• Design support using the Xilinx Alliance and
Foundation series software packages.
• Guaranteed 20 year life data retention
Product Specification
Description
The XC1700 family of configuration PROMs provides an
easy-to-use, cost-effective method for storing large Xilinx
FPGA configuration bitstreams.
When the FPGA is in Master Serial mode, it generates a
configuration clock that drives the PROM. A short access
time after the rising clock edge, data appears on the PROM
DATA output pin that is connected to the FPGA DIN pin. The
FPGA generates the appropriate number of clock pulses to
complete the configuration. Once configured, it disables the
PROM. When the FPGA is in Slave Serial mode, the PROM
and the FPGA must both be clocked by an incoming signal.
Multiple devices can be concatenated by using the CEO
output to drive the CE input of the following device. The
clock inputs and the DATA outputs of all PROMs in this
chain are interconnected. All devices are compatible and
can be cascaded with other members of the family.
For device programming, either the Xilinx Alliance or Foun-
dation series development system compiles the FPGA
design file into a standard Hex format, which is then trans-
ferred to most commercial PROM programmers.
VCC VPP GND
RESET/
OE
or
OE/
RESET
CE
CLK
Address Counter
TC
CEO
EPROM
Cell
Matrix
Output
OE
DATA
DS027_01_021500
Figure 1: Simplified Block Diagram (does not show programming circuit)
© 2000 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
DS027 (v3.1) July 5, 2000
Product Specification
www.xilinx.com
1-800-255-7778
1







XC17128EVO8I pdf, 数据表
XC1700E and XC1700L Series Configuration PROMs
R
XC1704L, XC1702L, XC1701L, XC17512L, XC1765EL, XC17128EL and XC17256EL
Absolute Maximum Ratings
Symbol
Description
Conditions Units
VCC Supply voltage relative to GND
0.5 to +7.0
V
VPP Supply voltage relative to GND
0.5 to +12.5
V
VIN Input voltage relative to GND
0.5 to VCC +0.5 V
VTS
TSTG
TSOL
Voltage applied to High-Z output
Storage temperature (ambient)
Maximum soldering temperature (10s @ 1/16 in.)
0.5 to VCC +0.5
65 to +150
+260
V
°C
°C
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those
listed under Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended
periods of time may affect device reliability.
Operating Conditions (3V Supply)
Symbol
Description
Min Max Units
VCC(1)
Supply voltage relative to GND (TA = 0°C to +70°C)
Supply voltage relative to GND (TA = 40°C to +85°C)
Commercial
Industrial
3.0
3.0
3.6
3.6
V
V
Notes:
1. During normal read operation VPP MUST be connect to VCC.
DC Characteristics Over Operating Condition
Symbol
VIH
VIL
VOH
VOL
ICCA
ICCA
ICCS
ICCS
IL
CIN
COUT
Description
High-level input voltage
Low-level input voltage
High-level output voltage (IOH = 3 mA)
Low-level output voltage (IOL = +3 mA)
Supply current, active mode (at maximum frequency) (XC1700L)
Supply current, active mode (at maximum frequency)
(XC1765EL, XC17128EL, XC17256EL)
Supply current, standby mode (XC1701L, XC17512L, XC17256L,
X1765EL, XC17128EL)
Supply current, standby mode (XC1702L, XC1704L)
Input or output leakage current
Input capacitance (VIN = GND, f = 1.0 MHz)
Output capacitance (VIN = GND, f = 1.0 MHz)
Min Max Units
2
VCC
V
0 0.8 V
2.4 - V
- 0.4 V
- 10 mA
- 5 mA
- 50 mA
- 350 mA
10 10 mA
- 10 pF
- 10 pF
8
www.xilinx.com
DS027 (v3.1) July 5, 2000
1-800-255-7778
Product Specification














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